Browse "EE-Journal Papers(저널논문)" by Author Ryu, Seung-Tak
Showing results 1 to 60 of 66
| A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI- SAR) ADC Kim, Wan; Hong, Hyeok-Ki; Roh, Yi-Ju; Kang, Hyun-Wook; Hwang, Sun-Il; Jo, Dong Shin; Chang, Dong-Jin; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.8, pp.1826 - 1839, 2016-08 |
| A 10-Bit 40-MS/s Pipelined ADC With a Wide Range Operating Temperature for WAVE Applications Oh, Ghilgeun; Lee, Chang-Kyo; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.1, pp.6 - 10, 2014-01 |
| A 10-bit 50-MS/s pipelined ADC with opamp cuffent reuse Ryu, Seung-Tak; Song, BS; Bacrania, K, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.42, pp.475 - 485, 2007-03 |
| A 10-Bit Column-Driver IC With Parasitic-Insensitive Iterative Charge-Sharing Based Capacitor-String Interpolation for Mobile Active-Matrix LCDs Kim, Hyun Sik; Yang, Jun-Hyeok; Park, Sang Hui; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.3, pp.766 - 782, 2014-03 |
| A 14-b linear capacitor self-trimming pipelined ADC Ryu, Seung-Tak; Ray, S; Song, BS; Cho, Gyu-Hyeong; Bacrania, K, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.39, pp.2046 - 2051, 2004-11 |
| A 15 mu m-Pitch, 8.7-ENOB, 13-Mcells/sec Logarithmic Readout Circuit for Multi-Level Cell Phase Change Memory Jin, Dong-Hwan; Kwon, Ji-Wook; Kim, Hyeon-June; Hwang, Sun-Il; Shin, Mincheol; Cheon, Junho; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.10, pp.2431 - 2440, 2015-10 |
| A 18.5 nW 12-bit 1-kS/s Reset-Energy Saving SAR ADC for Bio-Signal Acquisition in 0.18-mu m CMOS Seo, Min-Jae; Jin, Dong-Hwan; Kim, Ye-Dam; Hwang, Sun-Il; Kim, Jong-Pal; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.65, no.11, pp.3617 - 3627, 2018-11 |
| A 180-mu W, 120-MHz, Fourth Order Low-Pass Bessel Filter Based on FVF Biquad Structure Shin, Hundo; Ryu, Seung-Tak, IEICE TRANSACTIONS ON ELECTRONICS, v.E95C, no.5, pp.949 - 957, 2012-05 |
| A 2.7-M Pixels 64-mW CMOS Image Sensor With Multicolumn-Parallel Noise-Shaping SAR ADCs Hwang, Sun-Il; Chung, Jaehyun; Kim, Hyeon-June; Jang, Il Hoon; Seo, Min-Jae; Cho, Sang-Hyun; Kang, Heewon; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.3, pp.1119 - 1126, 2018-03 |
| A 28-nm 10-b 2.2-GS/s 18.2-mW Relative-Prime Time-Interleaved Sub-Ranging SAR ADC With On-Chip Background Skew Calibration Chang, Dong-Jin; Choi, Michael; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.9, pp.2691 - 2700, 2021-09 |
| A 4(th)-Order Continuous-Time Delta-Sigma Modulator With Hybrid Noise-Coupling Lozada, Kent Edrian; Jang, Il-Hoon; Bae, Gyeom-Je; Lee, Dong-Hun; Kim, Ye-Dam; Lee, Hankyu; Kim, Seong Joong; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.9, pp.3635 - 3639, 2022-09 |
| A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling Jang, Il Hoon; Seo, Min-Jae; Cho, Sang-Hyun; Lee, Jae-Keun; Baek, Seung-Yeob; Kwon, Sunwoo; Choi, Michael; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.4, pp.1139 - 1148, 2018-04 |
| A 40 mV Transformer-Reuse Self-Startup Boost Converter With MPPT Control for Thermoelectric Energy Harvesting Im, Jong-Pil; Wang, Se-Won; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.12, pp.3055 - 3067, 2012-12 |
| A 40-nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision Roh, Yi-Ju; Chang, Dong-Jin; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.12, pp.2833 - 2837, 2020-12 |
| A 550-mu W 10-b 40-MS/s SAR ADC With Multistep Addition-Only Digital Error Correction Cho, Sang-Hyun; Lee, Chang-Kyo; Kwon, Jong-Kee; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.46, pp.1881 - 1892, 2011-08 |
| A 6-b 4.1-GS/s Flash ADC With Time-Domain Latch Interpolation in 90-nm CMOS Kim, Jong-In; Sung, Ba-Ro-Saim; Kim, Wan; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.48, no.6, pp.1429 - 1441, 2013-06 |
| A 6-bit 3.3GS/s Current-Steering DAC with Stacked Unit Cell Structure Kim, Si-Nai; Kim, Wan; Lee, Chang-Kyo; Ryu, Seung-Tak, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.12, no.3, pp.270 - 277, 2012-09 |
| A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration Chang, Dong-Jin; Seo, Min-Jae; Hong, Hyeok-Ki; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.3, pp.281 - 285, 2018-03 |
| A 65 nm CMOS 7b 2 GS/s 20.7 mW Flash ADC With Cascaded Latch Interpolation Kim, Jong-In; Oh, Dong-Ryeol; Jo, Dong Shin; Sung, Ba-Ro-Saim; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.10, pp.2319 - 2330, 2015-10 |
| A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8x Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration Oh, Dong-Ryeol; 김종인; Jo, Dong-Shin; Kim, Woo-Cheol; Chang, Dong-Jin; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.1, pp.288 - 297, 2019-01 |
| A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs Kim, Si-Nai; Kim, Woo Cheol; Seo, Min-Jae; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.9, pp.1154 - 1158, 2018-09 |
| A 7-Bit Two-Step Flash ADC With Sample-and-Hold Sharing Technique Oh, Dong-Ryeol; Seo, Min-Jae; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.9, pp.2791 - 2801, 2022-09 |
| A 9.1-ENOB 6-mW 10-Bit 500-MS/s Pipelined-SAR ADC With Current-Mode Residue Processing in 28-nm CMOS Moon, Kyoung-Jun; Jo, Dong-Shin; Kim, Wan; Choi, Michael; Ko, Hyung-Jong; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.9, pp.2532 - 2542, 2019-09 |
| A Compact-Sized 9-Bit Switched-Current DAC for AMOLED Mobile Display Drivers Kim, Hyun-Sik; Jeon, Jin-Yong; Lee, Sung-Woo; Yang, Jun-Hyeok; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.58, no.12, pp.887 - 891, 2011-12 |
| A Decision-Error-Tolerant 45 nm CMOS 7b 1 GS/s Nonbinary 2b/Cycle SAR ADC Hong, Hyeok-Ki; Kim, Wan; Kang, Hyunwook; Park, Sun-Jae; Choi, Michael; Park, Ho-Jin; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.2, pp.543 - 555, 2015-02 |
| A Delta-Readout Scheme for Low-Power CMOS Image Sensors With Multi-Column-Parallel SAR ADCs Kim, Hyeon-June; Hwang, Sun-Il; Kwon, Ji-Wook; Jin, Dong-Hwan; Choi, Byoung-Soo; Lee, Sang-Gwon; Park, Jong-Ho; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.10, pp.2262 - 2273, 2016-10 |
| A Dual-Imaging Speed-Enhanced CMOS Image Sensor for Real-Time Edge Image Extraction Kim, Hyeon-June; Hwang, Sun-Il; Chung, Jaehyun; Park, Jong-Ho; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.52, no.9, pp.2488 - 2497, 2017-09 |
| A Fully On-Chip Gm-Opamp-RC Based Preamplifier for Electret Condenser Microphones Le, Huy-Binh; Ryu, Seung-Tak; Lee, Sang-Gug, IEICE TRANSACTIONS ON ELECTRONICS, v.E92C, pp.587 - 588, 2009-04 |
| A Long Reset-Time Power-On Reset Circuit With Brown-Out Detection Capability Le, Huy-Binh; Do, Xuan-Dien; Lee, Sang-Gug; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.58, no.11, pp.778 - 782, 2011-11 |
| A Low-Power TDC-Configured Logarithmic Resistance Sensor for MLC PCM Readout Kwon, Ji-Wook; Jin, Dong-Hwan; Kim, Hyeon-June; Hwang, Sun-Il; Shin, Min-Chul; Cheon, Jun-Ho; Ryu, Seung-Tak, IEEE SENSORS JOURNAL, v.16, no.14, pp.5524 - 5535, 2016-07 |
| A Noise-Immune High-Speed Readout Circuit for In-Cell Touch Screen Panels Yang, Jun-Hyeok; Jung, Seung-Chul; Son, Young-Suk; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.60, no.7, pp.1800 - 1809, 2013-07 |
| A Precise Decibel-Linear Programmable Gain Amplifier Using a Constant Current-Density Function Kang, So-Young; Ryu, Seung-Tak; Park, Chul-Soon, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.60, no.9, pp.2843 - 2850, 2012-09 |
| A Reference-Free Temperature-Dependency-Compensating Readout Scheme for Phase-Change Memory Using Flash-ADC-Configured Sense Amplifiers Jin, Dong-Hwan; Kwon, Ji-Wook; Seo, Min-Jae; Kim, Mi-Young; Shin, Min-Chul; Kang, Seok-Joon; Yoon, Jung-Hyuk; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.54, no.6, pp.1812 - 1823, 2019-06 |
| A Replica-Driving Technique for High Performance SC Circuits and Pipelined ADC Design Lee, Chang-Kyo; Kim, Wan; Kang, Hyun-Wook; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.60, no.9, pp.557 - 561, 2013-09 |
| A Reusable Code-Based SAR ADC Design With CDAC Compiler and Synthesizable Analog Building Blocks Seo, Min-Jae; Roh, Yi-Ju; Chang, Dong-Jin; Kim, Wan; Kim, Ye-Dam; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.12, pp.1904 - 1908, 2018-12 |
| A Sign-Equality-Based Background Timing-Mismatch Calibration Algorithm for Time-Interleaved ADCs Kang, Hyun-Wook; Hong, Hyeok-Ki; Park, Sanghoon; Kim, Ki-Jin; Ahn, Kwang-Ho; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.6, pp.518 - 522, 2016-06 |
| A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones Le, Huy-Binh; Lee, Sang-Gug; Ryu, Seung-Tak, IEICE TRANSACTIONS ON ELECTRONICS, v.E95C, no.1, pp.130 - 136, 2012-01 |
| A Single-Supply CDAC-Based Buffer-Embedding SAR ADC With Skip-Reset Scheme Having Inherent Chopping Capability Seo, Min-Jae; Jin, Dong-Hwan; Kim, Ye-Dam; Kim, Jong-Pal; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.55, no.10, pp.2660 - 2669, 2020-10 |
| A SUC-Based Full-Binary 6-bit 3.1-GS/s 17.7-mW Current-Steering DAC in 0.038 mm(2) Kim, Si-Nai; Kim, Mee-Ran; Sung, Ba-Ro-Saim; Kang, Hyun-Wook; Cho, Min-Hyung; Ryu, Seung-Tak, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.2, pp.794 - 798, 2016-02 |
| A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme Kang, Hyun-Wook; Hong, Hyeok-Ki; Kim, Wan; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.9, pp.2584 - 2594, 2018-09 |
| A Two-Channel Asynchronous SAR ADC With Metastable-Then-Set Algorithm Cho, Sang-Hyun; Lee, Chang-Kyo; Lee, Sang-Gug; Ryu, Seung-Tak, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.20, no.4, pp.765 - 769, 2012-04 |
| Air-Gap-Insensitive IPT Pad With Ferromagnetic and Conductive Plates Choi, Jin Soo; Jeong, Seog Y.; Choi, Byeung Guk; Ryu, Seung-Tak; Rim, Chun T.; Kim, Yun-Su, IEEE TRANSACTIONS ON POWER ELECTRONICS, v.35, no.8, pp.7863 - 7872, 2020-08 |
| An 8-Bit 1-GS/s Asynchronous Loop-Unrolled SAR-Flash ADC With Complementary Dynamic Amplifiers in 28-nm CMOS Oh, Dong-Ryeol; Moon, Kyoung-Jun; Lim, Won-Mook; Kim, Ye-Dam; An, Eun-Ji; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.4, pp.1216 - 1226, 2021-04 |
| An 88-dB Max-SFDR 12-bit SAR ADC With Speed-Enhanced ADEC and Dual Registers Baek, Seung-Yeob; Lee, Jae-Kyum; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.60, no.9, pp.562 - 566, 2013-09 |
| An Asynchronous Sampling-Based 128 x 128 Direct Photon-Counting X-Ray Image Detector with Multi-Energy Discrimination and High Spatial Resolution Kim, Hyun-Sik; Han, Sang-Wook; Yang, Jun-Hyeok; Kim, Sun-Il; Kim, Young; Kim, Sang-Wook; Yoon, Dae-Kun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.48, no.2, pp.541 - 558, 2013-02 |
| An Inherently dB-linear All-CMOS Variable Gain Amplifier Kwon, Ji-Wook; Ryu, Seung-Tak, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.11, no.4, pp.336 - 343, 2011-12 |
| Bandwidth - Power Optimization Methodology for SFB Filter Design Shin, Hun-Do; Ryu, Seung-Tak, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.12, no.1, pp.88 - 98, 2012-03 |
| Compact Mixed-Signal Convolutional Neural Network Using a Single Modular Neuron 창동진; Nam, Byeong-Gyu; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.12, pp.5189 - 5199, 2020-12 |
| Cryptographic transistor for true random number generator with low power consumption Kim, Seung-Il; You, Heong-Jin; Kim, Myung-Su; An, Un-Shi; Kim, Moon-Seok; Lee, Do-Hoon; Ryu, Seung-Tak; et al, Science Advances, v.10, no.8, 2024-02 |
| Digital error correction technique for binary decision successive approximation ADCs Cho, S. -H.; Lee, Chang-Kyo; Sung, B. -R. -S.; Ryu, Seung-Tak, ELECTRONICS LETTERS, v.45, no.8, pp.395 - 396, 2009-04 |
| Dual-mode VCO gain topology for reducing in-band noise and reference spur of PLL in 65 nm CMOS Cho, S. -H.; Lee, H. -D.; Kim, K. -D.; Ryu, Seung-Tak; Kwon, J. -K., ELECTRONICS LETTERS, v.46, no.5, pp.335 - 4853, 2010-03 |
| Fully flexible, lightweight, high performance all-solid-state supercapacitor based on 3-Dimensional-graphene/graphite-paper Ramadoss, Ananthakumar; Yoon, Ki-Yong; Kwak, Myung-Jun; Kim, Sun-I.; Ryu, Seung-Tak; Jang, Ji-Hyun, JOURNAL OF POWER SOURCES, v.337, pp.159 - 165, 2017-01 |
| Improved Charge Pump with Reduced Reverse Current Gwak, Kiuk; Lee, Sang-Gug; Ryu, Seung-Tak, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.12, no.3, pp.353 - 359, 2012-09 |
| Introduction to the Special Issue on the 2017 IEEE International Solid-State Circuits Conference Piessens, Tim; Ryu, Seung-Tak; Hung, Chih-Ming; Molnar, Alyosha; Meghelli, Mounir, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.52, no.12, pp.3115 - 3118, 2017-12 |
| Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC) Lin, Tsung-Hsien; Yang, Chia-Hsiang; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.10, pp.2739 - 2740, 2018-10 |
MixedNet: Network Design Strategies for Cost-Effective Quantized CNNs Chang, Dong-Jin; Nam, Byeong-Gyu; Ryu, Seung-Tak, IEEE ACCESS, v.9, pp.117554 - 117564, 2021 |
| New Curved Reflectors for Significantly Enhanced Solar Power Generation in Four Seasons Choi, Jin S.; Choi, Byeung G.; Kim, Ji H.; Ryu, Seung-Tak; Rim, Chun T.; Kim, Yun-Su, ENERGIES, v.12, no.23, 2019-12 |
| Noise analysis of replica driving technique and its verification to 12-bit 200 MS/s pipelined ADC Lee, Chang-Kyo; Ryu, Seung-Tak, IET CIRCUITS DEVICES & SYSTEMS, v.13, no.8, pp.1277 - 1283, 2019-11 |
| Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC Chang, Dong-Jin; Kim, Wan; Seo, Min-Jae; Hong, Hyeok-Ki; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.64, no.2, pp.322 - 332, 2017-02 |
| Power-efficient flash ADC with complementary voltage-to-time converter Oh, Dong-Ryeol; Jo, Dong Shin; 문경준; Roh, Yi-Ju; Ryu, Seung-Tak, ELECTRONICS LETTERS, v.53, no.12, pp.772 - +, 2017-06 |
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