Browse "School of Computing(전산학부)" by Author Huh, Jaehyuk

Showing results 18 to 77 of 98

18
Decoupled address translation architecture for heterogeneous memory systems = 이종 메모리 시스템을 위한 분리된 주소 변환 구조 연구link

Kim, Bokyeong; Huh, Jaehyuk; et al, 한국과학기술원, 2019

19
Decoupled address translation for heterogeneous memory systems

Kim, Bokyeong; Hwang, Soojin; Cha, Sanghoon; Park, Chang Hyun; Park, Jongse; Huh, Jaehyuk, 2020 ACM International Conference on Parallel Architectures and Compilation Techniques, PACT 2020, pp.155 - 156, Institute of Electrical and Electronics Engineers Inc., 2020-10

20
Deep neural network obfuscator for machine learning as a service in presence of cache side-channel attacks = 캐시 부채널 공격이 존재하는 서비스로서의 기계 학습을 위한 심층 신경망 난독화기link

Woo, Jaewook; Huh, Jaehyuk; et al, 한국과학기술원, 2019

21
Device for encrypting and/or decrypting packets and method for routing packets in memory network including the same

Ro, Yeonju; Jin, Seongwook; Huh, Jaehyuk; Kim, John Dongjun

22
Disaggregated Cloud Memory with Elastic Block Management

Koh, Kwang Won; Kim, Kangho; Jeon, Seunghyub; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.68, no.1, pp.39 - 52, 2019-01

23
Dynamic prefetcher reconfiguration for diverse memory architectures

Lee, Junghoon; Kim, Taehoon; Huh, Jaehyuk, 34th IEEE International Conference on Computer Design, ICCD 2016, pp.125 - 132, IEEE Circuits and Systems Society, 2016-10

24
Dynamic time slice management based on cpupool in virtualized systems = 가상화된 시스템에서 성능 향상을 위한 cpupool 기반의 동적 타임 슬라이스 관리 기법link

Heo, Taekyung; 허태경; et al, 한국과학기술원, 2016

25
Efficient Hardware-assisted Logging with Asynchronous and Direct-Update for Persistent Memory

Jeong, Jungi; Park, Chang Hyun; Huh, Jaehyuk; Maeng, Seungryoul, Proceedings of the 51th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) , pp.521 - 533, IEEE, 2018-10-23

26
Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching

Park, Chang Hyun; Heo, Taekyung; Huh, Jaehyuk, 43rd International Symposium on Computer Architecture, ISCA 2016, pp.217 - 229, ACM SIGGRAPH and IEEE TCCA, 2016-06

27
Efficient task scheduling policy for heterogeneous edge computing = 이기종 엣지 컴퓨팅에서의 효율적인 태스크 스케줄링 정책 연구link

Seo, Wonik; Huh, Jaehyuk; et al, 한국과학기술원, 2020

28
Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture

Sankaralingam, Karthikeyan; Nagarajan, Ramadass; Liu, Haiming; Kim, Changkyu; Huh, Jaehyuk; Burger, Doug; Keckler, Stephen W.; et al, Computer Architecture, 2003. Proceedings. 30th Annual International Symposium on, pp.422 - 433, 2003-06

29
Exploiting Mutual Awareness between Prefetchers and On-chip Networks in Multi-cores

Lee, Junghoon; Shin, Minjeong; Kim, Hanjoon; Kim, John; Huh, Jaehyuk, Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT, pp.177 - 178, Institute of Electrical and Electronics Engineers, 2011-10

30
Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems

Kim, Changdae; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.67, no.8, pp.1136 - 1152, 2018-08

31
Exploring the Design Space of Future CMPs

Huh, Jaehyuk; Keckler, S.W.; Burger, D., International Conference on Parallel Architectures and Compilation Techniques (PACT), pp.199 - 210, 2001-09

32
Fairness-oriented OS scheduling support for multicore systems

Kim, Changdae; Huh, Jaehyuk, 30th International Conference on Supercomputing, ICS 2016, pp.1 - 12, Association for Computing Machinery, 2016-06

33
Fast Two-Level Address Translation for Virtualized Systems

Ahn, Jeongseob; Jin, Seongwook; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.64, no.12, pp.3461 - 3474, 2015-12

34
FPGA 기반 기계 학습 가속기의 재구성을 통한 전력 소모 감소 방안 = Power-aware reconfiguration of FPGA-based machine learning acceleratorlink

조석철; 허재혁; et al, 한국과학기술원, 2020

35
Ghost routing to enable oblivious computation on memory-centric networks

Ro, Yeonju; Jin, Seongwook; Huh, Jaehyuk; Kim, John, 48th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2021, pp.930 - 943, Institute of Electrical and Electronics Engineers Inc., 2021-06-16

36
GVTS: Global Virtual Time Fair Scheduling to Support Strict Fairness on Many Cores

Kim, Changdae; Choi, Seungbeom; Huh, Jaehyuk, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, v.30, no.1, pp.79 - 92, 2019-01

37
H-SVM: Hardware-Assisted Secure Virtual Machines under a Vulnerable Hypervisor

Jin, Seongwook; Ahn, Jeongseob; Seol, Jinho; Cha, Sanghoon; Huh, Jaehyuk; Maeng, Seungryoul, IEEE TRANSACTIONS ON COMPUTERS, v.64, no.10, pp.2833 - 2846, 2015-10

38
Hardware-Assisted Secure Resource Accounting under a Vulnerable Hypervisor

Jin, Seongwook; Seol, Jinho; Huh, Jaehyuk; Maeng, Seungryoul, ACM SIGPLAN NOTICES, v.50, no.7, pp.201 - 213, 2015-07

39
Hardware-hardened Sandbox Enclaves for Trusted Serverless Computing

Park, Joongun; Kang, Seunghyo; Lee, SangHyeon; Kim, Taehoon; Park, Jongse; Kwon, Youngjin; Huh, Jaehyuk, ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v.21, no.1, 2024-01

40
Heterogeneous Isolated Execution for Commodity GPUs

Jang, Insu; Tang, Adrian; Kim, Taehoon; Sethumadhavan, Simha; Huh, Jaehyuk, 24th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2019, pp.455 - 468, Association for Computing Machinery, 2019-04-13

41
HPCCD: Hybrid Parallel Continuous Collision Detection using CPUs and GPUs

Kim, Duksu; Heo, Jae-Pil; Huh, Jaehyuk; Kim, John; Yoon, Sung-Eui, Computer Graphics Forum (Pacific Graphics), 2009-10-07

42
Hybrid TLB coalescing: Improving TLB translation coverage under diverse fragmented memory allocations

Park, Chang Hyun; Heo, Taekyung; Jeong, Jungi; Huh, Jaehyuk, 44th Annual International Symposium on Computer Architecture - ISCA 2017, pp.444 - 456, ACM SIGGRAPH and IEEE TCCA, 2017-06

43
Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training

Kim, Jungwoo; Na, Seonjin; Lee, SangHyeon; Lee, Sunho; Huh, Jaehyuk, IEEE/ACM International Symposium on Microarchitecture, IEEE/ACM, 2023-10-30

44
Improving the performance and energy efficiency of the virtual memory system by skipping unnecessary translations and dynamically adjusting HW translation coverage = 가상 메모리 시스템의 성능과 전력 효율성을 개선하기 위한 하드웨어 아키텍처와 운영체제 연구link

Park, Chang Hyun; Huh, Jaehyuk; et al, 한국과학기술원, 2019

45
InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-aware Inner Product Processing

Baek, Daehyeon; Hwang, Soojin; Heo, Taekyung; Kim, Daehoon; Huh, Jaehyuk, The 30th International Conference on Parallel Architectures and Compilation Techniques (PACT), ACM/IEEE, 2021-09-28

46
Interference Management for Distributed Parallel Applications in Consolidated Clusters

Han, Jaeung; Jeon, Seungheun; Choi, Young-ri; Huh, Jaehyuk, ACM SIGPLAN NOTICES, v.51, no.4, pp.443 - 456, 2016-04

47
Interference management for distributed parallel applications in consolidated clusters

Han, Jaeung; Jeon, Seungheun; Choi, Young-Ri; Huh, Jaehyuk, 21st International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2016, pp.443 - 456, Association for Computing Machinery, 2016-04

48
Janus: Supporting heterogeneous power management in virtualized environments

Kim, Daehoon; Alian, Mohammad; Huh, Jaehyuk; Kim, Nam Sung, 2017 Symposium on Cloud Computing, SoCC 2017, pp.652, Association for Computing Machinery, 2017-09

49
Locality-Aware Dynamic VM Reconfiguration on MapReduce Clouds

Park, Jongse; Lee, Daewoo; Kim, Bokyeong; Huh, Jaehyuk; Maeng, SeungRyoul, Symposium on High-Performance Parallel and Distributed Computing, pp.27 - 36, ACM Special Interest Group on Computer Architecture(SIGARCH), 2012-06

50
Managing heterogeneous SLO-aware machine learning inference tasks for gpu accelerated servers = GPU 가속기 서버에서의 SLO를 고려한 이종 기계학습 추론 작업 관리 기법 연구link

Choi, Seungbeom; Huh, Jaehyuk; et al, 한국과학기술원, 2022

51
Memory disaggregation system for supporting end performance SLA on clouds = 클라우드에서 최종 성능을 보장하는 메모리 분리 시스템 연구link

Koh, Kwangwon; Huh, Jaehyuk; et al, 한국과학기술원, 2018

52
Micro-sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems

Ahn, Jeongseob; Park, Chang Hyun; Huh, Jaehyuk, 47th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2014, pp.394 - 405, IEEE Computer Society, 2014-12-16

53
mNPUsim: Evaluating the Effect of Sharing Resources with Multi-Core NPUs

Hwang, Soojin; Lee, Sunho; Kim, Jungwoo; Kim, Hongbean; Huh, Jaehyuk, IEEE International Symposium on Workload Characterization, IEEE, 2023-10-03

54
Morphable DRAM Cache Design for Hybrid Memory Systems

Cha, Sanghoon; Kim, Bokyeong; Park, Chang Hyun; Huh, Jaehyuk, ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v.16, no.3, 2019-08

55
Mutually Aware Prefetcher and On-Chip Network Designs for Multi-Cores

Lee, Jung Hoon; Kim, Han Joon; Shin, Minjeong; Kim, John Dongjun; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.63, no.9, pp.2316 - 2329, 2014-09

56
Nested Enclave: Supporting Fine-grained Hierarchical Isolation with SGX

Park, Joongun; Kang, Naegyeong; Kim, Taehoon; Kwon, Youngjin; Huh, Jaehyuk, 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, pp.776 - 789, Institute of Electrical and Electronics Engineers Inc., 2020-06-01

57
NVM과 원격 메모리 접근을 동시에 사용하는 확장 메모리 시스템 연구 = Dual memory extension with NVM and RDMAlink

강승효; 허재혁; et al, 한국과학기술원, 2019

58
Parameter-Aware I/O Management for Solid State Disks (SSDs)

Kim, Jaehong; Seo, Sangwon; Jung, Dawoon; Kim, Jin-Soo; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.61, no.5, pp.636 - 649, 2012-05

59
Perforated Page: Supporting Fragmented Memory Allocation for Large Pages

Park, Chang Hyun; Cha, Sanghoon; Kim, Bokyeong; Kwon, Youngjin; Black-Schaffer, David; Huh, Jaehyuk, 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020, pp.913 - 925, Institute of Electrical and Electronics Engineers Inc., 2020-06-01

60
Performance estimation and scheduling of parallel computing programs in virtualized clusters = 가상 클러스터에서 실행되는 병렬 컴퓨팅 프로그램의 성능 예측 및 배치 연구link

Han, Jaeung; 한재웅; et al, 한국과학기술원, 2016

61
Power management for mobile games on heterogeneous multi-processing system = 이종코어를 가진 시스템에서의 모바일 게임을 위한 전력관리 기법link

Im, Dae-Gil; 임대길; et al, 한국과학기술원, 2016

62
Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds

Kim, Taeklim; Park, Chang Hyun; Huh, Jaehyuk; Ahn, Jeongseob, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, v.31, no.10, pp.2453 - 2465, 2020-10

63
Reconfigurable DRAM cache architecture for hybrid memory systems = 이종 메모리 시스템을 위한 재구성 가능한 DRAM 캐시 구조 연구link

Cha, Sanghoon; Huh, Jaehyuk; et al, 한국과학기술원, 2019

64
Redesigning hardware and software stacks for terabyte-scale memory systems = 테라바이트급 메모리 시스템 구축을 위한 하드웨어 및 소프트웨어 재설계 연구link

Heo, Taekyung; Huh, Jaehyuk; et al, 한국과학기술원, 2022

65
Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors

Lee, Jung Hoon; Kim, Taehoon; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.11, pp.3384 - 3397, 2016-11

66
Scalable persistent data protection with hardware trusted execution = 하드웨어 기반 신뢰 환경을 이용한 확장가능하고 지속적인 데이터 보호기법 연구link

Kim, Taehoon; Huh, Jaehyuk; et al, 한국과학기술원, 2020

67
Sector log: Fine-grained storage management for solid state drives

Jin, Seongwook; Kim, Jaehong; Kim, Jaegeuk; Huh, Jaehyuk; Maeng, SeungRyoul, 26th Annual ACM Symposium on Applied Computing, SAC 2011, pp.360 - 367, ACM, 2011-03-21

68
Secure I/O architecture for isolated heterogeneous computing with hardware assisted trusted execution environment = 신뢰할 수 있는 이종 컴퓨팅을 위한 하드웨어 보안 기술 기반 안전한 I/O 아키텍처 연구link

Jang, Insu; Huh, Jaehyuk; et al, 한국과학기술원, 2018

69
Secure In-memory Key-Value Storage with SGX

Kim, Taehoon; Park, Joongun; Woo, Jaewook; Jeon, Seungheun; Huh, Jaehyuk, ACM Symposium on Cloud Computing (SoCC), pp.507, ASSOC COMPUTING MACHINERY, 2018-10

70
Secure MMU: Architectural Support for Memory Isolation among Virtual Machines

Huh, Jaehyuk; Jin, Seongwook, 2011 IEEE/IFIP 41st International Conference on Dependable Systems and Networks Workshops (DSN-W), pp.217 - 222, IEEE COMPUTER SOC, 2011-06

71
Self-managed DRAM architecture to optimize capacity and energy efficiency = 효율적인 용량 확장 및 에너지 절감을 위한 자가 관리 DRAM 구조 연구link

Kim, Seikwon; Huh, Jaehyuk; et al, 한국과학기술원, 2018

72
Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing

Choi, Seungbeom; Lee, Sunho; Kim, Yeonjae; PARK, JONGSE; Kwon, Youngjin; Huh, Jaehyuk, 2022 USENIX Annual Technical Conference, USENIX (The Advanced Computing Systems Association), 2022-07-11

73
ShieldStore: Shielded in-memory key-value storage with SGX

김태훈; 박중언; Woo, Jaewook; Jeon, Seungheun; Huh, Jaehyuk, 14th European Conference on Computer Systems, EuroSys 2019, pp.1 - 15, Association for Computing Machinery, Inc, 2019-03-25

74
SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms

Seo, Wonik; Kim, Yeonjae; Cha, Sanghoon; Huh, Jaehyuk; Park, Jongse, ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v.18, no.4, pp.1 - 26, 2021-07

75
Speculative incoherent cache protocols

Huh, Jaehyuk; Burger, D; Chang, JC; Sohi, GS, IEEE MICRO, v.24, no.6, pp.104 - 109, 2004

76
Subspace snooping: Filtering snoops with operating system support

Kim, Daehoon; Ahn, Jeongseob; Kim, Jaehong; Huh, Jaehyuk, 19th International Conference on Parallel Architectures and Compilation Techniques, PACT 2010, pp.111 - 122, 2010-09-11

77
Supporting Dynamic Translation Granularity for Hybrid Memory Systems

Kim, Bokyeong; Hwang, Soojin; Cha, Sanghoon; Park, Chang Hyun; PARK, JONGSE; Huh, Jaehyuk, The 40th IEEE International Conference on Computer Design, ICCD 2022, pp.25 - 32, IEEE, 2022-10-24

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