Browse "EE-Conference Papers(학술회의논문)" by Author Cho, SeongHwan

Showing results 1 to 60 of 83

1
A 0.8V, 37nW, 42ppm/degrees C Sub-Bandgap Voltage Reference with PSRR of-81dB and Line Sensitivity of 51ppm/V in 0.18um CMOS

Kim, Myungjun; Cho, SeongHwan, 31st Symposium on VLSI Circuits, pp.C144 - C145, IEEE, 2017-06-07

2
A 0.8V, 37nW, 42ppm/°C sub-bandgap voltage reference with PSRR of-81dB and line sensitivity of 51ppm/V in 0.18um CMOS

Kim, Myungjun; Cho, SeongHwan, 31st Symposium on VLSI Circuits, VLSI Circuits 2017, pp.C144 - C145, Institute of Electrical and Electronics Engineers Inc., 2017-06

3
A 1,024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing

Choi, Woojun; Chen, Yiyang; Kim, Donghwan; Weaver, Sean; Schlotter, Tilman; Livanelioglu, Can; Liao, Jiawei; et al, 2023 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2023, Institute of Electrical and Electronics Engineers Inc., 2023-06-12

4
A 1.5-GHz 63dB SNR 20mW direct RF sampling bandpass VCO-based ADC in 65nm CMOS

Yoon, Y.-G.; Cho, SeongHwan, 2009 Symposium on VLSI Circuits, pp.270 - 271, 123, 2009-06-16

5
A 1.8 to 2.4-GHz 20mW digital-intensive RF sampling receiver with a noise-canceling bandpass low-noise amplifier in 90nm CMOS

Lee, J.; Kim, J.; Cho, SeongHwan, 2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010, pp.293 - 296, IEEE, 2010-05-23

6
A 10-bit 300Msample/s pipelined ADC using time-interleaved SAR ADC for front-end stages

Kim, Y.-H.; Lee, J.; Cho, SeongHwan, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.4041 - 4044, IEEE, 2010-05-30

7
A 10MHz 80μW 67 ppm/°C CMOS reference clock oscillator with a temperature compensated feedback loop in 0.18μm CMOS

Lee, J.; Cho, SeongHwan, 2009 Symposium on VLSI Circuits, pp.226 - 227, 123, 2009-06-16

8
A 14.2mW 2.55-to-3GHz cascaded PLL with reference injection, 800MHz delta-sigma modulator and 255fs rms integrated jitter in 0.13μm CMOS

Park, Dongmin; Cho, SeongHwan, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2012, pp.344 - 346, IEEE, 2012-02-22

9
A 148fsrms Integrated Noise 4MHz Bandwidth All-Digital Second-Order ΔΣ Time-to-Digital Converter Using Gated Switched-Ring Oscillator

Yu, Wonsik; Kim, KwangSeok; Cho, SeongHwan, 2013 IEEE Custom Integrated Circuits Conference - CICC, pp.1 - 4, IEEE, 2013-09-25

10
A 2.4-GHz reference doubled fractional-N PLL with dual phase detector in 0.13-um CMOS

Lee, W.; Cho, SeongHwan, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.1328 - 1331, IEEE, 2010-05-30

11
A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS

Kim, Hyunik; Cho, SeongHwan; Kim,Taeik; Park, Hojin; Kim, Yongjo, 2016 IEEE International Solid-State circuits Conference, pp.328 - 329, IEEE, 2016-02-03

12
A 2.5-GHz 860uW charge-recycling fractional-N frequency synthesizer in 130nm CMOS

Park, D.; Lee, W.; Jeon, S.; Cho, SeongHwan, 2008 Symposium on VLSI Circuits Digest of Technical Papers, VLSIC, pp.82 - 83, 2008-06-18

13
A 2.54μJ∙ppm2-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS

Baik, Seungyeob; Seol, Taeryoung; Lee, Sehwan; Kim, Geunha; Cho, SeongHwan; George, Arup K.; Lee, Junghyup, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, pp.114 - 115, Institute of Electrical and Electronics Engineers Inc., 2022-06

14
A 2.69uW Dual Quantization-based Capacitance-to-Digital Converter for Pressure, Humidity, and Acceleration Sensing in 0.18um CMOS

Park, Sujin; Lee, Geon-Hwi; Cho, SeongHwan, Conference on Optical and Infrared Interferometry and Imaging VII, pp.163 - 164, IEEE, 2018-06-20

15
A 210 nW 29.3 ppm/C 0.7 V Voltage Reference with a Temperature Range of -50 to 130 C in 0.13 um CMOS

Lee, Junghyup; Cho, SeongHwan, IEEE Symposium on VLSI Circuits, pp.278 - 279, IEEE, 2011-06-17

16
A 22.6 mu W Biopotential Amplifier with Adaptive Common-Mode Interference Cancelation Achieving Total-CMRR of 104dB and CMI Tolerance of 15V(pp) in 0.18 mu m CMOS

Koo, Nahmil; Kim, Hyojun; Cho, SeongHwan, IEEE International Solid-State Circuits Conference (ISSCC), pp.396 - +, IEEE, 2021-02

17
A 27.8μW Biopotential Amplifier Tolerant to 30VPP Common-Mode Interference for Two-Electrode ECG Recording in 0.18μm CMOS

Koo, Nahm Il; Cho, SeongHwan, 2019 IEEE International Solid-State Circuits Conference, ISSCC 2019, pp.366 - 368, Institute of Electrical and Electronics Engineers Inc., 2019-02-20

18
A 3.68aFrmsResolution 183dB FoMs 4th-order Continuous-Time Bandpass Σ Capacitance-to-Digital Converter in 0.18μm CMOS

Park, Sujin; Chae, Hangil; Cho, SeongHwan, 35th Symposium on VLSI Circuits, VLSI Circuits 2021, Institute of Electrical and Electronics Engineers Inc., 2021-06

19
A 43.4μW photoplethysmogram-based heart-rate sensor using heart-beat-locked loop

Jang, Do-Hun; Cho, SeongHwan, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.474, IEEE, 2018-02-14

20
A 470-μW multi-modulus injection-locked frequency divider with division ratio of 2, 3, 4, 5 and 6 in 0.13-μm CMOS

Lee, J.; Cho, SeongHwan, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC, pp.332 - 335, 2007-11-12

21
A 480-MHz to 1-GHz sub-picosecond clock generator with a fast and accurate automatic frequency calibration in 0.13-μm CMOS

Lee, J.; Kim, K.; Lee, J.; Jang, T.; Cho, SeongHwan, 2007 IEEE Asian Solid-State Circuits Conference, A-SSCC, pp.67 - 70, 123, 2007-11-12

22
A 6.5GHz CMOS FSK modulator for wireless sensor applications

Cho, SeongHwan, IEEE, 2002-06-01

23
A 7b, 3.75ps Resolution Two-Step Time-to-Digital Converter in 65nm CMOS Using Pulse-Train Time Amplifier

Kim, KwangSeok; Kim, YoungHwa; Yu, WonSik; Cho, SeongHwan, 2012 IEEE Symposia on VLSI Technology and Circuits, pp.192 - 193, IEEE, 2012-06-15

24
A 900 MHz 2.2 mW spread spectrum clock generator based on direct frequency synthesis and harmonic injection locking

Lee, W.; Cho, SeongHwan, 2009 International SoC Design Conference, ISOCC 2009, pp.524 - 527, 2009-11-22

25
A 95nW ring oscillator-based temperature sensor for RFID tags in 0.13um CMOS

Park, S.; Min, C.; Cho, SeongHwan, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, pp.1153 - 1156, 2009-05-24

26
A 9b, 1.12ps Resolution 2.5b/Stage Pipelined Time-to-Digital Converter in 65nm CMOS Using Time-Register

Kim, KwangSeok; Yu, Wonsik; Cho, SeongHwan, 2013 IEEE Symposia on VLSI Technology and Circuits, pp.136 - 137, IEEE, 2013-06-13

27
A background KDCO compensation technique for constant bandwidth in all-digital phase-locked loop

Lee, S.-P.; Cho, SeongHwan, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.3401 - 3404, IEEE, 2010-05-30

28
A bio-impedance measurement system for portable monitoring of heart rate and pulse wave velocity using small body area

Cho, M.-C.; Kim, J.-Y.; Cho, SeongHwan, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, pp.3106 - 3109, 2009-05-24

29
A Capacitance-to-Digital Converter with Differential Bondwire Accelerometer, On-chip Air Pressure and Humidity Sensor in 0.18 μm CMOS

Park, Sujin; Lee, Geon-Hwi; Oh, Seungmin; Cho, SeongHwan, 25th Asia and South Pacific Design Automation Conference, ASP-DAC 2020, pp.3 - 4, Institute of Electrical and Electronics Engineers Inc., 2020-01-13

30
A digital-intensive receiver front-end using VCO-based ADC with an embedded 2nd-order anti-aliasing sinc filter in 90nm CMOS

Kim, J.; Yu, W.; Yu, H.-K.; Cho, SeongHwan, 2011 IEEE International Solid-State Circuits Conference, ISSCC 2011, pp.176 - 177, IEEE, 2011-02-20

31
A Fractional-N Frequency Synthesizer using High-OSR Delta-Sigma Modulator and Nested-PLL

Park, Pyoungwon; Park, Dongmin; Cho, SeongHwan, IEEE Custom Integrated Circuits Conference - CICC, IEEE, 2011-09-20

32
A Highly Integrated Analog Base-band Transceiver Featuring a 12-bit 180MSPS Pipelined A/D Converter for Multi-Channel Wireless LAN

Cho, SeongHwan, IEEE Symposium on VLSI Circuits, pp.0 - 0, 2004-06-01

33
A Jitter-Programmable Bang-Bang Phase-Locked Loop using PVT Invariant Stochastic Jitter Monitor

Kim, Yong-Jo; Cho, SeongHwan; Jang, Taekwang, 2023 IEEE Asian Solid-State Circuits Conference, A-SSCC 2023, Institute of Electrical and Electronics Engineers Inc., 2023-11-08

34
A linearization technique for voltage-controlled oscillator-based ADC

Yoon, Y.-G.; Cho, M.-C.; Cho, SeongHwan, 2009 International SoC Design Conference, ISOCC 2009, pp.317 - 320, 2009-11-22

35
A low power pipelined analog-to-digital converter using series sampling capacitors

Cho, SeongHwan; Ock, S.; Lee, S.-H.; Lee, J.-S., IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.6178 - 6181, 2005-05-23

36
A low power transmitter for phase-shift keying modulation schemes

Lee, J.; Cho, SeongHwan, 2006 IEEE 17th International Symposium on Personal, Indoor and Mobile Radio Communications, PIMRC, 2006-09-11

37
A Low-Power Piezoelectric Speaker Driver Using LC Oscillator for Acoustic Communication

Lee, Eunseok; Park, Sujin; Koo, Nahm Il; Cho, SeongHwan, 16th International System-on-Chip Design Conference (ISOCC), pp.85 - 86, ISOCC, 2019-10-08

38
A Low-power Sleep Apnea Monitoring IC with a Duty-Recovered Body Channel Communication Receiver

Park, Pangi; Cho, Donghyeok; Cho, SeongHwan, 2022 IEEE Asian Solid-State Circuits Conference, A-SSCC 2022, pp.14 - 16, Institute of Electrical and Electronics Engineers Inc., 2022-11

39
A Motion-tolerant Heart Rate Detection Method Using Bio-impedance and MUSIC Algorithm

Lee, Jonghwa; Cho, SeongHwan, IEEE SENSORS 2015, IEEE, 2015-11-04

40
A Neural Recording and Stimulation Technique using Passivated Electrodes and Micro-Inductors

Cho, SeongHwan, IEEE Asian Solid-State Circuits Conference(ASSCC), IEEE, 2009-11-16

41
A power-optimized CMOS LC VCO with wide tuning range in 0.5-V supply

Park, D.; Cho, SeongHwan, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.3233 - 3236, 2006-05-21

42
A pulse transit time measurement method based on electrocardiography and bioimpedance

Bang, S.; Lee, C.; Park, J.; Cho, M.-C.; Yoon, Y.-G.; Cho, SeongHwan, 2009 IEEE Biomedical Circuits and Systems Conference, BioCAS 2009, pp.153 - 156, 123, 2009-11-26

43
A PVT tolerant BPF using turn-off MOSFET for bio applications in 0.13μm CMOS

Choo, K.; Lee, W.; Cho, SeongHwan, 2010 International SoC Design Conference, ISOCC 2010, pp.420 - 423, ISOCC, 2010-11-22

44
A ring oscillator-based temperature sensor for u-healthcare in 0.13um CMOS

Woo, S.-S.; Lee, J.-H.; Cho, SeongHwan, 2009 International SoC Design Conference, ISOCC 2009, pp.548 - 551, 2009-11-22

45
A supply noise insensitive PLL with a rail-to-rail swing ring oscillator and a wideband noise suppression loop

KIM, DONGIN; Cho, SeongHwan, 23rd Asia and South Pacific Design Automation Conference, ASP-DAC 2018, pp.283 - 284, Institute of Electrical and Electronics Engineers Inc., 2018-01-22

46
A Supply Noise Insensitive PLL with a Rail-to-Rail Swing Ring Oscillator and a Wideband Noise Suppression Loop

Kim, Dongin; Cho, SeongHwan, 31st Symposium on VLSI Circuits, pp.C180 - C181, IEEE, 2017-06-07

47
A Supply-Noise-Induced Jitter-Cancelling Clock Distribution Network for LPDDR5 Mobile DRAM featuring a 2nd-order Adaptive Filter

Jung, Yeonwook; Lee, Seongseop; Kim, Hyojun; Cho, SeongHwan, 2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, pp.458 - 460, Institute of Electrical and Electronics Engineers Inc., 2022-02

48
A Surface Conductance based Fully Integrated Standard CMOS Humidity Sensor without Post-Processing

Choi, Jinsoo; Kim, Gyusik; Yang, Hyun-Ho; Yoon, Jun-Bo; Cho, SeongHwan, IEEE SENSORS 2015, IEEE, 2015-11-04

49
A time-based analog-to-digital converter using a multi-phase voltage-controlled oscillator

Kim, J.; Cho, SeongHwan, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.3934 - 3937, 2006-05-21

50
A Time-Based Noise Shaping Analog-to-Digital Converter using a Gated-Ring Oscillator

Yoon, Young-Gyu; Park, Sang-Hyun; Cho, SeongHwan, International Microwave Workshop Series on Intelligent Radio for Future Personal Terminals (IMWS-IRFPT 2011), IEEE MTT-S, 2011-08-24

51
A time-based successive approximation register analog-to-digital converter using a pulse width modulation technique with a single capacitor

Kim, Y.-H.; Cho, SeongHwan, 2009 International SoC Design Conference, ISOCC 2009, pp.321 - 324, 2009-11-22

52
A Time-Domain Flash ADC Immune to Voltage Controlled Delay Line Non-Linearity

Kim, Young-Hwa; Cho, SeongHwan, The 9th IEEE International Conference on ASIC, pp.469 - 471, IEEE, 2011-10-27

53
A variation tolerent reconfigurable time difference amplifier

Kim, S.; Cho, SeongHwan, 2009 International SoC Design Conference, ISOCC 2009, pp.301 - 304, 2009-11-22

54
All Electrical and Real-time ECG, Respiration, Airflow, and Skin Conductance Monitoring System

Lee, Jonghwa; Yeon, Seong Ho; Cho, SeongHwan, International SoC Design Conference (ISOCC 2015), SoC 설계 연구회, 2015-11-04

55
An 80uW, 10MHz, 67 ppm/degree CMOS Reference Clock Oscillator with a Temperature Compensated Loop in 0.18um CMOS

Cho, SeongHwan, IEEE Symposium on VLSI Circuits, pp.0 - 0, 2009-06-18

56
An adaptive body-biased VCO with voltage-boosted switched tuning in 0.5-V supply

Park, Dongmin; Cho, SeongHwan, ESSCIRC 2006 - 32nd European Solid-State Circuits Conference, pp.444 - 447, ESSCIRC, 2006-09-19

57
An Adaptive Clocking System using Supply Tracking Clock Modulator with Background Calibrated Supply-Sensitivity in 28nm CMOS

Kim, Dongin; Cho, SeongHwan, 2021 IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, IEEE, 2021-11-07

58
An All-Digital Clock Generator Using a Fractionally Injection-Locked Oscillator in 65nm CMOS

Park , Pyoungwon; Park, Jaejin; Park, Hojin; Cho, SeongHwan, 2012 IEEE International Solid-State Circuits Conference, ISSCC 2011, pp.336 - 337, IEEE, 2012-02-22

59
An Architecture for a Power-Aware Distributed Microsensor Node

Cho, SeongHwan, IEEE Workshop on Signal Processing Systems (SiPS '00), pp.581 - 590, 2000-08-01

60
An Energy-Efficient Voltage Step-up System for 3D NAND Flash using Charge-Compensating Regulator

Jeong, Hyunsik; Cho, SeongHwan, 35th Symposium on VLSI Circuits, VLSI Circuits 2021, Institute of Electrical and Electronics Engineers Inc., 2021-06

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