A 43.4μW photoplethysmogram-based heart-rate sensor using heart-beat-locked loop

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Photoplethysmogram (PPG) sensors have gained great popularity in recent years as they can easily obtain heart rate (HR) in wearable devices such as smart watches and smart rings. However, one of the biggest problems for PPG sensors is their large power consumption, as wearable devices are highly limited in its battery capacity. The power consumption of a PPG sensor is typically dominated by the LED driver, which requires several to a few tens of mA of current. Thus, many previous works are aimed at reducing the LED driver power [1-5]. The most widely used method is duty-cycling the LED by using a train of discrete pulses instead of always turning on the LED [1-4]. As a PPG signal has low bandwidth, the duty-cycle ratio of the LED can be as low as 1%. Another low-power method is compressive sampling, which exploits the sparse nature of PPG signals [5]. Although it can reduce the effective duty-cycle ratio down to 0.0125%, a critical problem is that a large power consumption is required in reconstructing the compressive-sampled signal. In this work, we present an ultra-low-power PPG sensor with a heartbeat-locked loop (HBLL) that turns on the LED only during the PPG peaks and thus achieves an effective duty cycle of 0.0175%. We also reduce the power consumption of the analog front-end (AFE) by using the HBLL, which is in contrast to previous works where AFE power is not duty-cycled. A prototype implemented in 0.18μm CMOS demonstrates 43.4μW of total power consumption with less than 2.1bpm error in heart rate.
Publisher
IEEE
Issue Date
2018-02-14
Language
English
Citation

65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.474

DOI
10.1109/ISSCC.2018.8310390
URI
http://hdl.handle.net/10203/249720
Appears in Collection
EE-Conference Papers(학술회의논문)
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