Browse "School of Electrical Engineering(전기및전자공학부)" by Subject DRAM
Showing results 1 to 31 of 31
| A mechanically operated logic and random access memory based on a micro/nanoelectromechanical switch = 기계적으로 동작하는 스위치를 이용한 로직 및 랜덤 억세스 메모리 소자에 관한 연구link Jang, Weon-Wi; 장원위; et al, 한국과학기술원, 2009 |
| A Novel FinFET With High-Speed and Prolonged Retention for Dynamic Memory Moon, Dong-Il; Kim, Jee-Yeon; Jang, Hyunjae; Hong, Hee-Jeong; Kim, Choong Ki; Oh, Jae-Sub; Kang, Min-Ho; et al, IEEE ELECTRON DEVICE LETTERS, v.35, no.12, pp.1236 - 1238, 2014-12 |
| A simple method for high-frequency characterization of (Ba,Sr)TiO3 thin film capacitors Jang, BT; Kwak, DH; Cha, SY; Lee, SH; Lee, Hee Chul, INTEGRATED FERROELECTRICS, v.20, no.1-4, pp.215 - 224, 1998 |
| (A) Low Latency DRAM Architecture Exploiting Row Duplication = Row 복제를 활용한 낮은 레이턴시 DRAM 구조link Choi, Jung Whan; 최정완; et al, 한국과학기술원, 2015 |
| (A) study of geometric dependence for BJT-based 1T-DRAM = 기생 바이폴라 트랜지스터를 이용한 커패시터 없는 디램의 기하학적 의존성에 관한 연구link Moon, Dong-Il; 문동일; et al, 한국과학기술원, 2010 |
| Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks Seol, Hoseok; Kim, Minhye; Kim, Taesoo; Kim, Yongdae; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.70, no.4, pp.539 - 551, 2021-04 |
| An Optically Assisted Program Method for Capacitorless 1T-DRAM Moon, Dong-Il; Choi, Sung-Jin; Han, Jin-Woo; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.57, no.7, pp.1714 - 1718, 2010-07 |
| Capacitor-Less 4F(2) DRAM Using Vertical InGaAs Junction for Ultimate Cell Scalability Kim, Joon Pyo; Sim, Jaeho; Bidenko, Pavlo; Geum, Dae-Myeong; Kim, Seong Kwang; Shim, Joonsup; Kim, Jongmin; et al, IEEE ELECTRON DEVICE LETTERS, v.43, no.11, pp.1834 - 1837, 2022-11 |
| Design of pipelined cache DRAM for fast random-access = 고속 Random-access를 위한 pipelined cache DRAM의 설계link Kook, Jeong-Hoon; 국정훈; et al, 한국과학기술원, 2001 |
| DRAM capacitor 의 응용을 위한 ALD기법을 사용하여 증착한 HfLaO의 전기적 특성에 관한 연구 = Electrical characteristics of ALD HfLaO for DRAM capacitor applicationlink 설혜정; Seol, Hea-Jung; et al, 한국과학기술원, 2009 |
| DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing Shin, Wongyu; Choi, Jungwhan; Jang, Jaemin; Suh, Jinwoong; Moon, Youngsuk; Kwon, Yongkee; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.10, pp.3027 - 3040, 2016-10 |
| Effects of Ir electrodes on the dielectric constants of Ba0.5Sr0.5TiO3 films Cha, SY; Jang, BT; Lee, Hee Chul, JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS, v.38, no.1AB, pp.49 - 51, 1999-01 |
| EFFECTS OF SURFACE PRETREATMENT OF POLYSILICON ELECTRODE PRIOR TO SI3N4 DEPOSITION ON THE ELECTRICAL CHARACTERISTICS OF SI3N4 DIELECTRIC FILMS Yoon, Giwan; JOSHI, AB; KWONG, DL; MATHEWS, VK; THAKUR, RPS; FAZAN, PC, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.41, no.3, pp.347 - 351, 1994-03 |
| Elaborate Refresh: A Fine Granularity Retention Management for Deep Submicron DRAMs Seol, Hoseok; Shin, Wongyu; Jang, Jaemin; Choi, Jungwhan; Lee, Hakseung; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.67, no.10, pp.1403 - 1415, 2018-10 |
| Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried Si1-yCy Substrate for Multifunctioning Flash Memory and 1T-DRAM Han, Jin-Woo; Ryu, Seong-Wan; Kim, Chung-Jin; Choi, Sung-Jin; Kim, Sung-Ho; Ahn, Jae-Hyuk; Kim, Dong-Hyun; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.56, no.4, pp.641 - 647, 2009-04 |
| Evolution of Unified-RAM: 1T-DRAM and BE-SONOS Built on a Highly Scaled Vertical Channel Moon, Dong-Il; Kim, Jee Yeon; Moon, Joon-Bae; Kim, Dong-Oh; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.61, no.1, pp.60 - 65, 2014-01 |
| Fin-Width Dependence of BJT-Based 1T-DRAM Implemented on FinFET Moon, Dong-Il; Choi, Sung-Jin; Han, Jin-Woo; Kim, Sung-Ho; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.31, no.9, pp.909 - 911, 2010-09 |
| Flash memory utilizing discrete charge storage node for universal memory = 이산적 전하 저장소가 삽입된 플래시 메모리 및 Universal 메모리로의 응용link Ryu, Seong-Wan; 류승완; et al, 한국과학기술원, 2009 |
Gateless and Capacitorless Germanium Biristor with a Vertical Pillar Structure Bae, Hagyoul; Lee, Geon Beom; Hur, Jae; Park, Jun Young; Kim, Da Jin; Kim, Myung Su; Choi, Yang-Kyu, MICROMACHINES, v.12, no.8, 2021-07 |
| Investigation on Schottky barrier MOSFET for 3D memory application = 3D 메모리 소자 응용을 위한 Schottky barrier MOSFET에 관한 연구link Choi, Sung-Jin; 최성진; et al, 한국과학기술원, 2008 |
| Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation Shin, Wongyu; Choi, Jung Whan; Jang, Jaemin; Suh, Jinwoong; Kwon, Yongkee; Moon, Youngsuk; Kim, Hongsik; et al, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.7, pp.2213 - 2227, 2016-07 |
| Rank-Level Parallelism in DRAM Shin, Wongyu; Jang, Jaemin; Choi, Jungwhan; Suh, Jinwoong; Kwon, Yongkee; Moon, Youngsuk; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.66, no.7, pp.1274 - 1280, 2017-07 |
| Refinement of Unified Random Access Memory Ryu, Seong-Wan; Han, Jin-Woo; Kim, Chung-Jin; Choi, Sung-Jin; Kim, Sung-Ho; Kim, Jin-Soo; Kim, Kwang-Hee; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.56, no.4, pp.601 - 608, 2009-04 |
| Refresh-Aware Write Recovery Memory Controller Jang, Jaemin; Shin, Wongyu; Choi, Jungwhan; Suh, Jinwoong; Kwon, Yongkee; Kim, Yongju; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.66, no.4, pp.688 - 701, 2017-04 |
| Resistive-Memory Embedded Unified RAM (R-URAM) Kim, Sung-Ho; Choi, Sung-Jin; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.56, no.11, pp.2670 - 2674, 2009-11 |
| Signal Integrity and Computing Performance Analysis of a Processing-In-Memory of High Bandwidth Memory (PIM-HBM) Scheme Kim, Seongguk; Kim, Subin; Cho, Kyungjun; Shin, Taein; Park, Hyunwook; Lho, Daehwan; Park, Shinyoung; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.11, no.11, pp.1955 - 1970, 2021-11 |
| Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory Jang, Jaemin; Shin, Wongyu; Choi, Jungwhan; Kim, Yongju; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.68, no.5, pp.752 - 764, 2019-05 |
| Thermal and Signal Integrity Co-Design and Verification of Embedded Cooling Structure With Thermal Transmission Line for High Bandwidth Memory Module Son, Keeyoung; Kim, Seongguk; Park, Hyunwook; Shin, Taein; Kim, Keunwoo; Kim, Minsu; Sim, Boogyo; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.12, no.9, pp.1542 - 1556, 2022-09 |
| TRiM: Tensor Reduction in Memory Kim, Byeongho; Park, Jaehyun; Lee, Eojin; Rhu, Minsoo; Ahn, Jung Ho, IEEE COMPUTER ARCHITECTURE LETTERS, v.20, no.1, pp.5 - 8, 2021-01 |
| VLIW 프로세서의 효율적인 Prefetch 구조의 설계 = The design of effective prefetch structure for VLIW processorlink 한경남; Han, Kyung-Nam; et al, 한국과학기술원, 1997 |
| 고속 Row-cycle이 가능한 VPM(virtual pipelined memory) 구조에 대한 연구 = A study on VPM(virtual pipelined memory) architeture for a fast row-cycle DRAMlink 윤치원; Yoon, Chi-Won; et al, 한국과학기술원, 1999 |
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