Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 25601 to 25620 of 51095
| Modeling and analysis of multiple coupled through-silicon vias (TSVs) for 2.5-D/3-D ICs Cho, Kyungjun; Kim, Youngwoo; Park, Junyong; Kim, Hyesoo; Kim, Seongguk; Kim, Subin; Park, Gap Yeol; et al, Joint International Symposium on Electromagnetic Compatibility, Sapporo and Asia-Pacific International Symposium on Electromagnetic Compatibility, EMC Sapporo/APEMC 2019, pp.346 - 349, Institute of Electrical and Electronics Engineers Inc., 2019-06 |
| Modeling and analysis of noise coupling and RF sensitivity in through-silicon-via (TSV) silicon interposer = 실리콘 관통 비아 실리콘 인터포져에서의 노이즈 커플링 모델링과 RF감도 해석link Yoon, Ki-Hyun; 윤기현; et al, 한국과학기술원, 2010 |
| Modeling and Analysis of Open Defect in Through Silicon Via (TSV) Channel Kim, Joungho; Jung, Daniel H; Kim, Heegon; Kim, Jonghoon J; Bae, Hyun-Cheol; Choi, Kwangseong, IEEE Electromagnetic Compatibility of Integrated Circuits(EMC Compo), pp.163 - 166, IEEE Electromagnetic Compatibility of Integrated Circuits(EMC Compo), 2013-12-15 |
| Modeling and analysis of performance degradation on flash analog-to-digital converter affected by power/ground noise = 전원/접지 잡음에 의한 플래시 아날로그 디지털 컨버터의 성능 저하에 대한 모델링과 분석link Ahn, Woo-Jin; 안우진; et al, 한국과학기술원, 2010 |
| Modeling and analysis of power distribution network in 2.5D and 3D IC based on segmentation method and target impedance considering current spectrum = 구조분할 방법과 전류 스펙트럼에 기반한 목표 임피던스를 이용한 2.5차원/3차원 반도체에서 전력분배망의 모델링 및 분석link Kim, Youngwoo; 김영우; et al, 한국과학기술원, 2015 |
| Modeling and analysis of power for System-on-a-Chip design Nair, I.I.; Shin, Youngsoo; Bergamaschi, R.A.; Bhattacharya, S; Darringer, J; Kosonocky, S, IBM Austin Conference on Energy-Efficient Design (ACEED), IBM, 2003-03 |
| Modeling and analysis of power supply noise effects on adc with chip-pcb hierarchical power distribution networks (PDNs) = 칩-피씨비로 구성된 전력 분배망을 갖는 아날로그 디지털 변환기의 전력잡음에 의한 현상 모델링과 분석link Bae, Bum-Hee; 배범희; et al, 한국과학기술원, 2011 |
| Modeling and Analysis of Power Supply Noise Effects on Analog-to-Digital Converter in 3DIC Bae, Bumhee; Shim, Yujeong; Cho, Jonghyun; Kim, Joungho, 8th International Workshop on Electromagnetic Compatibility of Integrated Circuits, EMC Compo 2011, 2011-11-06 |
| Modeling and Analysis of Power Supply Noise Imbalance on Ultra High Frequency Differential Low Noise Amplifiers in a System-in-Package Koo, Kyoung-Choul; Shim, Yu-Jeong; Yoon, Chang-Wook; Kim, Jae-Min; Yoo, Jeong-Sik; Pak, Jun-So; Kim, Joung-Ho, IEEE TRANSACTIONS ON ADVANCED PACKAGING, v.33, no.3, pp.602 - 616, 2010-08 |
| Modeling and Analysis of Return Paths of Common Mode EMI Noise Currents From Motor Drive System in Hybrid Electric Vehicle Kim, Joungho; Hongseok Kim; Jinwook Song; Younghwan Kwack; Dong-Hyun Kim; Eulyong Kim, 2015 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2015 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2015-05-26 |
| Modeling and Analysis of Simultaneous Switching Noise Coupling for a CMOS Negative-Feedback Operational Amplifier in System-in-Package Shim, Yu-Jeong; Park, Jong-Bae; Kim, Jae-Min; Song, Eak-Hwan; Yoo, Jeong-Sik; Pak, Jun-So; Kim, Joung-Ho, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.51, no.3, pp.763 - 773, 2009-08 |
| Modeling and Analysis of Simultaneous Switching Noise Coupling for a CMOS Negative-Feedback Operational Amplifier in System-in-Package Shim, Yujeong; Park, Jongbae; Kim, Jaemin; Song, Eakhwan; Yoo, Jeongsik; Pak, Junso; Kim, Joungho, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, Vol.51, No.3, pp.763-773, 2009-08 |
| Modeling and Analysis of Simultaneous Switching Noise Effects on Jitter Characteristics of Delay Locked Loop and Serial Link in a Hierarchical System of Chip, Package and PCB = 칩, 패키지, 피씨비로 구성된 시스템에서 동시 스위칭 노이즈가 DLL과 직렬 통신 시스템의 지터 특성에 미치는 영향에 대한 모델링과 분석link Shim, Yu-Jeong; 심유정; et al, 한국과학기술원, 2011 |
| Modeling and analysis of static and dynamic characteristics for buck-type three-phase PWM rectifier by circuit DQ transformation Han, SB; Choi, NS; Rim, Chuntaek; Cho, Gyu-Hyeong, IEEE TRANSACTIONS ON POWER ELECTRONICS, v.13, no.2, pp.323 - 336, 1998-03 |
| Modeling and Analysis of System-Level Power Supply Noise Induced Jitter (PSIJ) for 4 Gbps High Bandwidth Memory (HBM) I/O Interface Shin, TaeIn; Kim, Joungho; Park, Hyunwook; Kim, Keunwoo; Kim, SeongGuk; Son, Keeyoung; Park, Gap Yeol; et al, IEEE Electrical Design of Advanced Packaging and Systems, EDAPS 2021, IEEE, 2021-12-13 |
| Modeling and Analysis of Through-Silicon Via (TSV) Noise Coupling and Suppression Using a Guard Ring Cho, Jong-Hyun; Song, Eak-Hwan; Yoon, Ki-Hyun; Pak, Jun-So; Kim, Joo-Hee; Lee, Woo-Jin; Song, Tai-Gon; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.1, no.2, pp.220 - 233, 2011-02 |
| Modeling and analysis of TSV noise coupling effects on active circuits and shielding structures in 2.5D/3D IC = 2.5/3차원 집적회로에서 실리콘 관통 비아의 잡음전달이 능동회로에 미치는 영향에 대한 모델링 및 분석과 차폐에 대한 연구link Lim, Jaemin; Kim, Joungho; et al, 한국과학기술원, 2019 |
| Modeling and Analysis of TSV Noise Coupling Effects on RF LC-VCO and Shielding Structures in 3D IC Lim, Jaemin; Cho, Jonghyun; Jung, Daniel Hyunsuk; Kim, Jonghoon J.; Choi, Sumin; Kim, Dong-Hyun; Lee, Man Ho; et al, IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.60, no.6, pp.1939 - 1947, 2018-12 |
| Modeling and Analysis of Wireless LAN Traffic Yamkhin, Dashdorj; Won, Youjip, JOURNAL OF INFORMATION SCIENCE AND ENGINEERING, v.25, no.6, pp.1783 - 1801, 2009-11 |
| Modeling and Analysis of Wireless LANs with a Backoff Freezing Mechanism Hwang, Ho Young; Kim, Seong Joon; Kim, Byung-Soo; Sung, Dan Keun; Park, Suwon; Chung, Young-uk, INFORMATION-AN INTERNATIONAL INTERDISCIPLINARY JOURNAL, v.15, no.3, pp.1081 - 1094, 2012-03 |
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