Browse "School of Computing(전산학부)" by Author Huh, Jaehyuk
Showing results 62 to 98 of 98
| Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds Kim, Taeklim; Park, Chang Hyun; Huh, Jaehyuk; Ahn, Jeongseob, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, v.31, no.10, pp.2453 - 2465, 2020-10 |
| Reconfigurable DRAM cache architecture for hybrid memory systems = 이종 메모리 시스템을 위한 재구성 가능한 DRAM 캐시 구조 연구link Cha, Sanghoon; Huh, Jaehyuk; et al, 한국과학기술원, 2019 |
| Redesigning hardware and software stacks for terabyte-scale memory systems = 테라바이트급 메모리 시스템 구축을 위한 하드웨어 및 소프트웨어 재설계 연구link Heo, Taekyung; Huh, Jaehyuk; et al, 한국과학기술원, 2022 |
| Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors Lee, Jung Hoon; Kim, Taehoon; Huh, Jaehyuk, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.11, pp.3384 - 3397, 2016-11 |
| Scalable persistent data protection with hardware trusted execution = 하드웨어 기반 신뢰 환경을 이용한 확장가능하고 지속적인 데이터 보호기법 연구link Kim, Taehoon; Huh, Jaehyuk; et al, 한국과학기술원, 2020 |
| Sector log: Fine-grained storage management for solid state drives Jin, Seongwook; Kim, Jaehong; Kim, Jaegeuk; Huh, Jaehyuk; Maeng, SeungRyoul, 26th Annual ACM Symposium on Applied Computing, SAC 2011, pp.360 - 367, ACM, 2011-03-21 |
| Secure I/O architecture for isolated heterogeneous computing with hardware assisted trusted execution environment = 신뢰할 수 있는 이종 컴퓨팅을 위한 하드웨어 보안 기술 기반 안전한 I/O 아키텍처 연구link Jang, Insu; Huh, Jaehyuk; et al, 한국과학기술원, 2018 |
| Secure In-memory Key-Value Storage with SGX Kim, Taehoon; Park, Joongun; Woo, Jaewook; Jeon, Seungheun; Huh, Jaehyuk, ACM Symposium on Cloud Computing (SoCC), pp.507, ASSOC COMPUTING MACHINERY, 2018-10 |
| Secure MMU: Architectural Support for Memory Isolation among Virtual Machines Huh, Jaehyuk; Jin, Seongwook, 2011 IEEE/IFIP 41st International Conference on Dependable Systems and Networks Workshops (DSN-W), pp.217 - 222, IEEE COMPUTER SOC, 2011-06 |
| Self-managed DRAM architecture to optimize capacity and energy efficiency = 효율적인 용량 확장 및 에너지 절감을 위한 자가 관리 DRAM 구조 연구link Kim, Seikwon; Huh, Jaehyuk; et al, 한국과학기술원, 2018 |
| Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing Choi, Seungbeom; Lee, Sunho; Kim, Yeonjae; PARK, JONGSE; Kwon, Youngjin; Huh, Jaehyuk, 2022 USENIX Annual Technical Conference, USENIX (The Advanced Computing Systems Association), 2022-07-11 |
| ShieldStore: Shielded in-memory key-value storage with SGX 김태훈; 박중언; Woo, Jaewook; Jeon, Seungheun; Huh, Jaehyuk, 14th European Conference on Computer Systems, EuroSys 2019, pp.1 - 15, Association for Computing Machinery, Inc, 2019-03-25 |
SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms Seo, Wonik; Kim, Yeonjae; Cha, Sanghoon; Huh, Jaehyuk; Park, Jongse, ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, v.18, no.4, pp.1 - 26, 2021-07 |
| Speculative incoherent cache protocols Huh, Jaehyuk; Burger, D; Chang, JC; Sohi, GS, IEEE MICRO, v.24, no.6, pp.104 - 109, 2004 |
| Subspace snooping: Filtering snoops with operating system support Kim, Daehoon; Ahn, Jeongseob; Kim, Jaehong; Huh, Jaehyuk, 19th International Conference on Parallel Architectures and Compilation Techniques, PACT 2010, pp.111 - 122, 2010-09-11 |
| Supporting Dynamic Translation Granularity for Hybrid Memory Systems Kim, Bokyeong; Hwang, Soojin; Cha, Sanghoon; Park, Chang Hyun; PARK, JONGSE; Huh, Jaehyuk, The 40th IEEE International Conference on Computer Design, ICCD 2022, pp.25 - 32, IEEE, 2022-10-24 |
| The Effect of Multi-core on HPC Applications in Virtualized Systems Han, Jaeung; Ahn, Jeongseob; Kim, Changdae; Kwon, Youngjin; Choi, Young-ri; Huh, Jaehyuk, 2010 conference on Parallel processing, pp.615 - 623, VHPC, 2010-08-31 |
| TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit Lee, Sunho; Kim, Jungwoo; Na, Seonjin; Park, Jongse; Huh, Jaehyuk, 28th Annual IEEE International Symposium on High-Performance Computer Architecture (HPCA), pp.229 - 243, IEEE COMPUTER SOC, 2022-04-04 |
| Transparent Dual Memory Compression Architecture Kim, Seikwon; Lee, Seonyoung; Kim, Taehoon; Huh, Jaehyuk, 26th International Conference on Parallel Architectures and Compilation Techniques, PACT 2017, pp.206 - 218, ACM and IEEE Computer Society, 2017-09 |
| Trusted execution environment for multi-level security and hardware sandbox = 다계층 보안과 하드웨어 샌드박스를 지원하기 위한 신뢰 실행 환경 연구link Park, Joongun; Huh, Jaehyuk; et al, 한국과학기술원, 2023 |
| Tunable Memory Protection for Secure Neural Processing Units Lee, Sunho; Na, Seonjin; Kim, Jungwoo; PARK, JONGSE; Huh, Jaehyuk, The 40th IEEE International Conference on Computer Design, ICCD 2022, pp.105 - 108, IEEE, 2022-10-24 |
| vCache: Architectural Support for Transparent and Isolated Virtual LLCs in Virtualized Environments Kim, Dae Hoon; Kim, Hwan Ju; Kim, Nam Sung; Huh, Jaehyuk, The 48th Annual IEEE/ACM International Symposium on Microarchitecture, IEEE and ACM SIGMICRO, 2015-12-09 |
| VIP: Virtual performance-state for efficient power management of virtual machines Kang, Ki-Dong; Alian, Mohammad; Kim, Daehoon; Huh, Jaehyuk; Kim, Nam Sung, 2018 ACM Symposium on Cloud Computing, SoCC 2018, pp.237 - 248, Association for Computing Machinery, Inc, 2018-10 |
| Virtual Snooping Coherence for Multi-Core Virtualized Systems Kim, Daehoon; Park, Chang Hyun; Kim, Hwanju; Huh, Jaehyuk, IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, v.27, no.7, pp.2155 - 2167, 2016-07 |
| Virtual snooping: Filtering snoops in virtualized multi-cores Kim, Daehoon; Kim, Hwanju; Huh, Jaehyuk, 43rd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2010, pp.459 - 470, 2010-12-04 |
| Virtualizing Performance Asymmetric Multi-core Systems Kwon, Youngjin; Kim, Changdae; Maeng, SeungRyoul; Huh, Jaehyuk, 38th Annual International Symposium on Computer Architecture, pp.45 - 56, ACM SIGGRAPH and IEEE TCCA, 2011-06 |
| Zebra Refresh: Value Transformation for Zero-Aware DRAM Refresh Reduction Kim, Seikwon; Kwak, Wonsang; Kim, Changdae; Huh, Jaehyuk, IEEE COMPUTER ARCHITECTURE LETTERS, v.17, no.2, pp.130 - 133, 2018-07 |
| ZeroKernel: Secure Context-isolated Execution on Commodity GPUs Kwon, Ohmin; Kim, Yonggon; Huh, Jaehyuk; Yoon, Hyunsoo, IEEE TRANSACTIONS ON DEPENDABLE AND SECURE COMPUTING, v.18, no.4, pp.1974 - 1988, 2021-07 |
| 메모리 지역성의 활용을 위한 다중 심층 신경망 가속기 아키텍처 = Architectural support for exploiting memory locality of spatial multi-tenant neural processing unitslink 이상현; 허재혁; et al, 한국과학기술원, 2022 |
| 순환 신경망 추론에서의 희소행렬-희소벡터 곱셈을 위한 가변적 하드웨어 가속기 = Morphable hardware accelerator for sparse matrix - sparse vector multiplication for RNN inferencelink 황수진; 허재혁; et al, 한국과학기술원, 2021 |
| 신뢰할 수 있는 기계학습 가속기를 위한 하드웨어 보안 기법 = Hardware security techniques for trusted machine learning acceleratorslink 이선호; 허재혁; et al, 한국과학기술원, 2021 |
| 엣지 환경에서 이기종 프로세서 간의 간섭을 고려한 다중 DNN 스케줄링 기법 = Interference-aware multi-DNN scheduling on heterogeneous processors in edge systemlink 김연재; 허재혁; et al, 한국과학기술원, 2022 |
| 이종 컴퓨팅 환경에서 안전한 실행 환경 제공을 위한 GPU 아키텍처 연구 = New GPU architecture for trusted execution environment in heterogeneous computing environmentlink 나선진; 허재혁; et al, 한국과학기술원, 2018 |
| 클라우드 상의 어플리케이션을 보호하기 위한 격리 실행 공간의 중첩 기법 = Nested trusted execution environment for securing multi-tier application on cloudslink 박중언; 허재혁; et al, 한국과학기술원, 2018 |
| 편광기반 측위 기술의 적용공간 확장을 위한 시분할 다중화 기법 연구 = Time-division multiplexing for space extension of polarized light sensing-based positioning systemlink 전현기; 허재혁; et al, 한국과학기술원, 2019 |
| 하드웨어 기반의 안전한 실행환경을 사용한 키-밸류 스토어 보안 = Security Support for Key-value Store with a HW-based Isolated Execution Environmentlink 전승흔; 허재혁; et al, 한국과학기술원, 2017 |
| 희소 행렬 곱셈을 위한 확장성 있는 인메모리 프로세싱 아키텍처 = (A) scalable processing-in-memory architecture for sparse matrix multiplicationslink 백대현; 허재혁; et al, 한국과학기술원, 2020 |
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