Browse "College of Engineering(공과대학)" by Type Article
Showing results 721 to 780 of 63138
| A 36 fps SXGA 3-D display processor embedding a programmable 3-D graphics rendering engine Kim, SH; Yoon, JS; Yu, CH; Kim, D; Chung, K; Lim, HS; Lee, YG; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.43, pp.1247 - 1259, 2008-05 |
A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System Lee, Jihee; Lee, Kyoung-Rog; Eovino, Benjamin E.; Park, Jeong Hoan; Liang, Luna Yue; Lin, Liwei; Yoo, Hoi-Jun; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.6, pp.1910 - 1923, 2021-06 |
| A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array Ha, Sangwoo; Kim, Sangjin; Han, Donghyeon; Um, Soyeon; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.5, pp.2433 - 2437, 2022-05 |
| A 360-fs-Time-Resolution 7-bit Stochastic Time-to-Digital Converter With Linearity Calibration Using Dual Time Offset Arbiters in 65-nm CMOS Chung, Hayun; Hyun, Minji; Kim, Jungwon, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.3, pp.940 - 949, 2021-03 |
| A 37.5 uW Body Channel Communication Wake-Up Receiver With Injection-Locking Ring Oscillator for Wireless Body Area Network Cho, Hyun-Woo; Bae, Joon-Sung; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.60, no.5, pp.1200 - 1208, 2013-05 |
| A 3D CFD study on the effects of feed spacer designs on membrane performance for high-permeance RO membranes Bae, Sungjin; Gu, Boram; Lee, Jay Hyung, JOURNAL OF WATER PROCESS ENGINEERING, v.53, 2023-07 |
| A 3D Hierarchical Host with Enhanced Sodiophilicity Enabling Anode-Free Sodium-Metal Batteries Lee, Kyungbin; Lee, Young Jun; Lee, Michael J.; Han, Junghun; Lim, Jeonghoon; Ryu, Kun; Yoon, Hana; et al, ADVANCED MATERIALS, v.34, no.14, pp.2109767, 2022-04 |
| A 3D Imaging Framework Based on High-Resolution Photometric-Stereo and Low-Resolution Depth Lu, Zheng; Tai, Yu-Wing; Deng, Fanbo; Ben-Ezra, Moshe; Brown, Michael S., INTERNATIONAL JOURNAL OF COMPUTER VISION, v.102, no.1-3, pp.18 - 32, 2013-03 |
| A 3D neuronal network read-out interface with high recording performance using a neuronal cluster patterning on a microelectrode array 윤동조; 남윤기, Biosensors and Bioelectronics, v.261, pp.116507, ACCEPT |
| A 3D tumor spheroid chip with the pharmacokinetic drug elimination model developed by balanced droplet dispensing Kim, Tae-Yoon; Doh, Il; Cho, Young-Ho, SENSORS AND ACTUATORS B-CHEMICAL, v.174, pp.436 - 440, 2012-11 |
| A 4 bit digital liquid lens for variable focal length Lee, Dong Woo; Cho, Young-Ho, JOURNAL OF MICROMECHANICS AND MICROENGINEERING, v.20, 2010-03 |
| A 4 x 10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS Lee, Joon Yeong; Yang, Jaehyeok; Yoon, Jong Hyeok; Kwon, Soon Won; Won, Hyosup; Han, Jinho; Bae, Hyeon-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.6, pp.2310 - 2320, 2016-06 |
| A 4(th)-Order Continuous-Time Delta-Sigma Modulator With Hybrid Noise-Coupling Lozada, Kent Edrian; Jang, Il-Hoon; Bae, Gyeom-Je; Lee, Dong-Hun; Kim, Ye-Dam; Lee, Hankyu; Kim, Seong Joong; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.9, pp.3635 - 3639, 2022-09 |
| A 4-bit CMOS phase shifter using distributed active switches Kang, Dong-Woo; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.55, no.7, pp.1476 - 1483, 2007-07 |
| A 4-gb/s CMOS clock and data recovery circuit using 1/8-rate clock technique Song, SJ; Park, SM; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.38, pp.1213 - 1219, 2003-07 |
| A 4-to-42-V Input 3.3-V Output Self-Biased DC–DC Buck Converter Featuring Leakage-Emulated Bootstrap Voltage Refresher and Anti-Deadlock Lee, Heejun; Han, Hyunki; Kim, Hyun-Sik, IEEE SOLID-STATE CIRCUITS LETTERS, v.6, pp.261 - 264, 2023-09 |
| A 4-w master-slave switching amplitude modulator for Class-E1 EDGE polar transmitters Lee, Min-Chul; Kwak, Tae-Woo; Choi, Bae-Kun; Cho, Gyu-Hyeong, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.55, pp.484 - 488, 2008-05 |
| A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling Jang, Il Hoon; Seo, Min-Jae; Cho, Sang-Hyun; Lee, Jae-Keun; Baek, Seung-Yeob; Kwon, Sunwoo; Choi, Michael; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.4, pp.1139 - 1148, 2018-04 |
| A 4.78 mu s Dynamic Compensated Inductive Coupling Transceiver for Ubiquitous and Wearable Body Sensor Network Lee, Seul-Ki; Yoo, Jerald; Yoo, Hoi-Jun, IEICE TRANSACTIONS ON COMMUNICATIONS, v.E93B, pp.2892 - 2900, 2010-11 |
| A 4.9 m Omega-Sensitivity Mobile Electrical Impedance Tomography IC for Early Breast-Cancer Detection System Hong, Sun-Joo; Lee, Kwonjoon; Ha, Unsoo; Kim, Hyunki; Lee, Yongsu; Kim, Youchang; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.1, pp.245 - 257, 2015-01 |
| A 40 mV Transformer-Reuse Self-Startup Boost Converter With MPPT Control for Thermoelectric Energy Harvesting Im, Jong-Pil; Wang, Se-Won; Ryu, Seung-Tak; Cho, Gyu-Hyeong, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.12, pp.3055 - 3067, 2012-12 |
| A 40-GHz hybrid class-AB/class-B CMOS VCO with a current-combining transformer Oh, Juntaek; Jang, Jingyu; Hong, Songcheol, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.60, no.6, pp.1319 - 1323, 2018-06 |
| A 40-nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision Roh, Yi-Ju; Chang, Dong-Jin; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.12, pp.2833 - 2837, 2020-12 |
| A 400-nW 19.5-fJ/Conversion-Step 8-ENOB 80-kS/s SAR ADC in 0.18-um CMOS Cheong, Jia Hao; Chan, Kok Lim; Khannur, Pradeep Basappa; Tiew, Kei Tee; Je, Minkyu, IEEE Transactions on Circuits and Systems II: Express Briefs, v.58, no.7, pp.407 - 411, 2011-07 |
| A 40fJ/c-s 1 V 10 bit SARADC with Dual Sampling Capacitive DAC Topology Kim, Bin-Hee; Yan, Long; Yoo, Jerald; Yoo, Hoi-Jun, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.11, pp.23 - 32, 2011-03 |
| A 43 nW, 32 kHz, +/- 4.2 ppm Piecewise Linear Temperature-Compensated Crystal Oscillator With Delta sigma-Modulated Load Capacitance Park, Sujin; Seol, Ji-Hwan; Xu, Li; Cho, Seonghwan; Sylvester, Dennis; Blaauw, David, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.4, pp.1175 - 1186, 2022-04 |
| A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse Um, Soyeon; Kim, Sangyeob; Kim, Sangjin; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.68, no.5, pp.1605 - 1609, 2021-05 |
| A 43.3-mu W Biopotential Amplifier With Tolerance to Common-Mode Interference of 18 V-pp and T-CMRR of 105 dB in 180-nm CMOS Koo, Nahmil; Kim, Hyojun; Cho, Seonghwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.2, pp.508 - 519, 2023-02 |
| A 44.2-TOPS/W CNN Processor With Variation-Tolerant Analog Datapath and Variation Compensating Circuit Seo, Jin-O; Seok, Mingoo; Cho, Seonghwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.5, pp.1603 - 1611, 2024-05 |
| A 45 mu W Injection-Locked FSK Wake-Up Receiver With Frequency-to-Envelope Conversion for Crystal-Less Wireless Body Area Network Bae, Joonsung; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.6, pp.1351 - 1360, 2015-06 |
| A 45-dB, 150-Hz, and 18-mW Touch Controller for On-Cell Capacitive TSP Systems Jang, Yeongshin; Ko, Younghun; Choi, Jung-Min; Oh, Hyoung Seok; Lee, Sang-Gug, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.10, pp.748 - 752, 2014-10 |
| A 45-mu W, 162.1-dBc/Hz FoM, 490-MHz Two-Stage Differential Ring VCO Without a Cross-Coupled Latch Jung, Ohyong; Seok, HyunGi; Dissanayake, Anjana; Lee, Sang-Gug, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.11, pp.1579 - 1583, 2018-11 |
| A 457 nW Near-Threshold Cognitive Multi-Functional ECG Processor for Long-Term Cardiac Monitoring Liu, Xin; Zhou, Jun; Yang, Yongkui; Wang, Bo; Lan, Jingjing; Wang, Chao; Luo, Jianwen; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.11, pp.2422 - 2434, 2014-11 |
| A 46-nF/10-M omega Range 114-aF/0.37-omega Resolution Parasitic- and Temperature-Insensitive Reconfigurable RC-to-Digital Converter in 0.18-mu m CMOS George, Arup K.; Shim, Wooyoon; Kung, Jaeha; Kim, Ji-Hoon; Je, Minkyu; Lee, Junghyup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.69, no.3, pp.1171 - 1184, 2022-03 |
| A 470-mu W 5-GHz Digitally Controlled Injection-Locked Multi-Modulus Frequency Divider With an In-Phase Dual-Input Injection Scheme Lee, Joonhee; Park, Sunghyun; Cho, SeongHwan, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.19, no.1, pp.61 - 70, 2011-01 |
| A 48 mu W, 8.88 mW/W Batteryless Wirelessly Power Transferred Body Channel Communication Identification System Lee, Jihee; Lee, Yongsu; Cho, Hyunwoo; Yoo, Hoi-Jun, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.17, no.6, pp.927 - 934, 2017-12 |
| A 4800 bps LPC Vocoder with Improved Excitation Un, Chong-Kwan; W.Y.Sung, 한국음향학회지, v.1, no.1, pp.54 - 59, 1982-03 |
| A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection Song, Seokchan; Kim, Soyeon; Park, Gwangtae; Han, Donghyeon; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.5, pp.2443 - 2447, 2022-05 |
| A 5 Gbps 1.6 mW/G bps/CH Adaptive Crosstalk Cancellation Scheme With Reference-less Digital Calibration and Switched Termination Resistors for Single-Ended Parallel Interface Hwang, Kyu-Dong; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.10, pp.3016 - 3024, 2014-10 |
| A 5-BIT CMOS PHASE SHIFTER WITH LOW PHASE AND AMPLITUDE ERROR USING A NEW 1800 PHASE SHIFTER FEATURING PROCESS-VARIATION IMMUNITY Kang, Dong-Woo; Hong, Songcheol, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.52, no.6, pp.1325 - 1328, 2010-06 |
| A 5-Gb/s 2.67-mW/Gb/s Digital Clock and Data Recovery With Hybrid Dithering Using a Time-Dithered Delta-Sigma Modulator Lee, Taeho; Kim, Yonghun; Sim, Jaehyeong; Park, Jun-Seok; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.4, pp.1450 - 1459, 2016-04 |
| A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network Lee, Taeho; Kim, Yong Hun; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.25, no.1, pp.380 - 384, 2017-01 |
| A 5-Gb/s Digital Clock and Data Recovery Circuit With Reduced DCO Supply Noise Sensitivity Utilizing Coupling Network Lee, Taeho; Kim, Yong Hun; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.25, no.1, pp.380 - 384, 2017-01 |
| A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme Oh, Kwang-Il; Kim, Lee-Sup; Park, Kwang-Il; Jun, Young-Hyun; Choi, Joo Sun; Kim, Kinam, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.44, pp.2222 - 2232, 2009-08 |
| A 5-GHz WLAN RF CMOS Power Amplifier With a Parallel-Cascoded Configuration and an Active Feedback Linearizer Kang, Seung Hoon; Baek, Donghyun; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.65, no.9, pp.3230 - 3244, 2017-09 |
| A 5-V Dynamic Class-C Paralleled Single-Stage Amplifier With Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique Koh, Seok Tae; Lee, Jihun; Gang, Gyeong-Gu; HAN, HYUNKI; Kim, Hyun-Sik, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.12, pp.3593 - 3607, 2021-12 |
| A 5.2 mW IEEE 802.15.6 HBC Standard Compatible Transceiver With Power Efficient Delay-Locked-Loop Based BPSK Demodulator Cho, Hyunwoo; Lee, Hyungwoo; Bae, Joonsung; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.11, pp.2549 - 2559, 2015-11 |
| A 5.2 mW Self-Configured Wearable Body Sensor Network Controller and a 12 mu W Wirelessly Powered Sensor for a Continuous Health Monitoring System Yoo, Jerald; Yan, Long; Lee, Seul-Ki; Kim, Yong-Sang; Yoo, Hoi-Jun, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.45, pp.178 - 188, 2010-01 |
| A 5.2-GHz LNA in 0.35-mu m CMOS utilizing inter-stage series resonance and optimizing the substrate resistance Cha, CY; Lee, Sang-Gug, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.38, pp.669 - 672, 2003-04 |
| A 5.25-GHz image rejection RF front-end receiver with polyphase filters Kim, CW; Lee, Sang-Gug, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.16, pp.302 - 304, 2006-05 |
| A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation Lee, Won-Young; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.59, no.11, pp.2518 - 2528, 2012-11 |
| A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme Lee, Won-Young; Hwang, Kyu-Dong; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.59, no.12, pp.2858 - 2866, 2012-12 |
| A 5.5-dBm, 31.9% Efficiency 915-MHz Transmitter Employing Frequency Tripler and 207-mu W Synthesizer Choi, Kyung-Sik; Kim, Keun-Mok; Kim, Su-Bin; Yun, Byeong-Hun; Ko, Jinho; Kim, Jusung; Lee, Sang-Gug, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.30, no.1, pp.90 - 93, 2020-01 |
| A 5.8 GHz Four-Channel RF Beamforming IC Based on a Vector Modulator for Wireless Power Transmission Wang, Seunghun; Hong, Songcheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.3, pp.709 - 713, 2022-03 |
| A 5.8 GHz Integrated CMOS Dedicated Short Range Communication Transceiver for the Korea/Japan Electronic Toll Collection System Kwon, Ku-Duck; Choi, Jae-Young; Choi, Jeong-Ki; Hwang, Yong-Seok; Lee, Kwy-Ro; Ko, Jin-Ho, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.58, pp.2751 - 2763, 2010-11 |
| A 5.8-GHz DSRC Transceiver With a 10-uA Interference-Aware Wake-Up Receiver for the Chinese ETCS Choi, Jeongki; Lee, In-Young; Lee, Kanghyuk; Yun, Seok-Oh; Kim, Joomyoung; Ko, Jinho; Yoon, Giwan; et al, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.62, no.12, pp.3146 - 3160, 2014-12 |
| A 5.8-GHz High-Frequency Resolution Digitally Controlled Oscillator Using the Difference Between Inversion and Accumulation Mode Capacitance of pMOS Varactors Yoo, Sang-Sun; Choi, Yong-Chang; Song, Hong-Joo; Park, Seung-Chan; Park, Jeong-Ho; Yoo, Hyung-Joun, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.59, no.2, pp.375 - 382, 2011-02 |
| A 5.8-GHz LNA with image rejection and gain control based on 0.18-mu m CMOS Kim, JP; Oh, YH; Choi, JY; Lee, Sang-Gug, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.38, pp.477 - 480, 2003-09 |
| A 5.9 GHz Channel Characterization at Railroad Crossings for Train-to-Infrastructure (T2I) Communications Choi, Junsung; Ahn, Seungyoung, ELECTRONICS, v.12, no.11, 2023-05 |
| A 50-300-MHz Highly Linear and Low-Noise CMOS Gm-C Filter Adopting Multiple Gated Transistors for Digital TV Tuner ICs Kwon, Kuduck; Kim, Hong-Teuk; Lee, Kwyro, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.57, pp.306 - 313, 2009-02 |
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