Browse by Subject MOSFET
Showing results 1 to 60 of 81
| A Comparative Study on Hot-Carrier Injection in 5-story Vertically Integrated Inversion-Mode and Junctionless-Mode Gate-All-Around MOSFETs Kim, Seong-Yeon; Lee, Byung-Hyun; Hur, Jae; Park, Jun-Young; Jeon, Seung-Bae; Lee, Seung-Wook; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.39, no.1, pp.4 - 7, 2018-01 |
| A Junctionless Single Transistor Neuron with Vertically Stacked Multiple Nanowires for Highly Scalable Neuromorphic Hardware Han, Joon-Kyu; Yu, Ji-Man; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.69, no.6, pp.3142 - 3146, 2022-06 |
| A nonquasi-static table-based small-signal model of heterojunction bipolar transistor Ko, Sangsoo; Koh, Kyungmin; Park, Hyun-Min; Hong, Songcheol, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.49, no.10, pp.1681 - 1686, 2002-10 |
| A spacer patterning technology for nanoscale CMOS Choi, Yang-Kyu; King, TJ; Hu, CM, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.49, no.3, pp.436 - 441, 2002-03 |
| A Steep-Slope Phenomenon by Gate Charge Pumping in a MOSFET Kim, Myung-Su; Yun, Gyeong-Jun; Kim, Wu-Kang; Seo, Myungsoo; Kim, Da-Jin; Yu, Ji-Man; Han, Joon-Kyu; et al, IEEE ELECTRON DEVICE LETTERS, v.43, no.4, pp.521 - 524, 2022-04 |
| A UNIFIED CURRENT VOLTAGE MODEL FOR LONG-CHANNEL NMOSFETS PARK, CK; LEE, CY; Lee, Kwyro; MOON, BJ; BYUN, YH; SHUR, M, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.38, no.2, pp.399 - 406, 1991-02 |
| (A) study of geometric dependence for BJT-based 1T-DRAM = 기생 바이폴라 트랜지스터를 이용한 커패시터 없는 디램의 기하학적 의존성에 관한 연구link Moon, Dong-Il; 문동일; et al, 한국과학기술원, 2010 |
| (A) study on physical behaviors of the substrate resistance for CMOS RF modeling = CMOS RF 모델링을 위한 기판저항의 물리적 특성에 관한 연구link Kwon, Myeong-Ju; 권명주; et al, 한국과학기술원, 2001 |
| (A) study on substrate resistance of RF MOSFETs = RF MOSFET의 기판 저항에 관한 연구link Han, Jeong-Hu; 한정후; Shin, Hyung-Cheol; Lee, Kwy-Ro; et al, 한국과학기술원, 2002 |
| Al2O3-Ge-On-insulator n- and p-MOSFETs with fully NiSi and NiGe dual gates Yu, DS; Huang, CH; Chin, A; Zhu, CX; Li, MF; Cho, Byung Jin; Kwong, DL, IEEE ELECTRON DEVICE LETTERS, v.25, no.3, pp.138 - 140, 2004-03 |
| An Optically Assisted Program Method for Capacitorless 1T-DRAM Moon, Dong-Il; Choi, Sung-Jin; Han, Jin-Woo; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.57, no.7, pp.1714 - 1718, 2010-07 |
| Ballistic transport based on atomic-level modeling: electron and phonon = 원자수준 모델링을 통한 탄도 수송 연구: 전자와 포논link Choi, Ho-Won; 최호원; et al, 한국과학기술원, 2014 |
Bayesian Optimization of MOSFET Devices Using Effective Stopping Condition Kim, Bokyeom; Shin, Mincheol, IEEE ACCESS, v.9, pp.108480 - 108494, 2021-08 |
| Characteristics of an N2O Radical Oxide Grown by using Electron Cyclotron Resonance Radical Oxidation and Its Application to 50-nm MOSFETs with Floating Polysilicon Spacers sangyeon han; sung-il chang; hyungcheol; jongho lee, JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.41, no.6, pp.927 - 931, 2002-12 |
| Characteristics of MOSFET with source/drain-to-gate non-overlapped structure = Source/drain과 gate가 non-overlap된 MOSFET특성에 관한 연구link Lee, Hyun-Jin; 이현진; et al, 한국과학기술원, 2003 |
| Characterization of current injection mechanism in Schottky-barrier metal-oxide-semiconductor field-effect transistors Choi, Sung-Jin; Han, Jin-Woo; Jang, Moon-Gyu; Choi, Chel-Jong; Choi, Yang-Kyu, APPLIED PHYSICS LETTERS, v.95, no.8, 2009-08 |
| Characterization of Subgap Density-of-States by Sub-Bandgap Optical Charge Pumping in In0.53Ga0.47As Metal-Oxide-Semiconductor Field-Effect Transistors Yoo, Han Bin; Kim, Seong Kwang; Kim, Junyeap; Yu, Jintae; Choi, Sung-Jin; Kim, Dae Hwan; Kim, Dong Myong, JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.20, no.7, pp.4287 - 4291, 2020-07 |
| CMOS Ternary Logic with a Biristor Threshold Switch for Low Static Power Consumption Han, Joon-Kyu; Yu, Ji-Man; Nam, Seo-Yeon; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.43, no.7, pp.1005 - 1008, 2022-07 |
| Computational Study on the Performance of Si Nanowire pMOSFETs Based on the k . p Method Shin, Mincheol; Lee, S; Klimeck, G, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.57, no.9, pp.2274 - 2283, 2010-09 |
| Curing of Hot-Carrier Induced Damage by Gate-Induced Drain Leakage Current in Gate-All-Around FETs Park, Jun-Young; Yun, Dae-Hwan; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.40, no.12, pp.1909 - 1912, 2019-12 |
| Damage immune field effect transistors with vacuum gate dielectric Han, Jin-Woo; Ahn, Jae-Hyuk; Choi, Yang-Kyu, JOURNAL OF VACUUM SCIENCE TECHNOLOGY B, v.29, no.1, pp.110141 - 110144, 2011-01 |
| Defect-free ultra-shallow source/drain extension using spin-on-dopants for deep submicron SOI MOSFET applications Yang, JH; Oh, Jihun; Cho, WJ; Lee, SJ; Im, KJ; Park, K, JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.44, no.2, pp.423 - 426, 2004-02 |
| Demonstration of a Curable Nanowire FinFET Using Punchthrough Current to Repair Hot-Carrier Damage Park, Jun-Young; Hur, Jae; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.39, no.2, pp.180 - 183, 2018-02 |
| Dislocation effects in FinFETs for different III-V compound semiconductors Hur, Ji-Hyun; Jeon, Sanghun, JOURNAL OF PHYSICS D-APPLIED PHYSICS, v.49, no.15, 2016-04 |
| Drain current thermal noise modeling for deep submicron n- and p-channel MOSFETs Han K.; Lee, Kwyro; Shin H., SOLID-STATE ELECTRONICS, v.48, no.12, pp.2255 - 2262, 2004-12 |
| Electrical characterization and neuromorphic application of 3-dimensional semiconductor devices = 3차원 구조 반도체 소자의 전기적 특성과 뉴로모픽 소자로의 응용link Kim, Seong-Yeon; Choi, Yang-Kyu; et al, 한국과학기술원, 2020 |
| Electron Mobility in Surface- and Buried-Channel Flatband In0.53Ga0.47As MOSFETs With ALD Al2O3 Gate Dielectric Bentley, Steven J.; Holland, Martin; Li, Xu; Paterson, Gary W.; Zhou, HP; Ignatova, Olesya; Thoms, Stephen; et al, IEEE ELECTRON DEVICE LETTERS, v.32, no.4, pp.494 - 496, 2011-04 |
| Engineering of source/drain junctions in MOSFETs and its application to memory cells = MOSFET의 소스/드레인 전극의 엔지니어링 및 메모리 셀로의 응용link Choi, Sung-Jin; 최성진; et al, 한국과학기술원, 2012 |
| Extremely scaled silicon nano-CMOS devices Chang, LL; Choi, Yang-Kyu; Ha, DW; Ranade, P; Xiong, SY; Bokor, J; Hu, CM; et al, PROCEEDINGS OF THE IEEE, v.91, no.11, pp.1860 - 1873, 2003-11 |
| Fabrication of 50 nm trigate silicon on insulator metal-oxide-silicon field-effect transistor without source/drain activation annealing Im, Kiju; Cho, Won-Ju; Ahn, Chang-Geun; Yang, Jong-Heon; Oh, Jihun; Lee, Seongjae; Hwang, Hyunsang, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, v.43, no.5A, pp.2438 - 2441, 2004-05 |
| First-principles study on defects related to the instability of MOSFET and TFT devices = 제일원리 계산을 통한 MOSFET 및 TFT 소자의 불안정성 관련 결함에 대한 연구link Noh, Hyeon-Kyun; 노현균; et al, 한국과학기술원, 2013 |
| First-principles study on the mechanism for boron diffusion at SiGe/SiO$_2$ interfaces. = 제일원리 계산을 통한 규소게르마늄-규소산화물 계면에서의 붕소 확산 메카니즘 연구link Lee, Chang-Hwi; 이창휘; et al, 한국과학기술원, 2014 |
| H-2 High Pressure Annealed Y-Doped ZrO2 Gate Dielectric With an EOT of 0.57 nm for Ge MOSFETs Lee, Tae In; Manh-Cuong Nguyen; Ahn, Hyunjun; 김민주; Shin, Eui Joong; Hwang, Wan Sik; Yu, Hyun-Young; et al, IEEE ELECTRON DEVICE LETTERS, v.40, no.9, pp.1350 - 1353, 2019-09 |
| High-Performance Polycrystalline Silicon TFT on the Structure of a Dopant-Segregated Schottky-Barrier Source/Drain Choi, Sung-Jin; Han, Jin-Woo; Kim, Sung-Ho; Moon, Dong-Il; Jang, Moon-Gyu; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.31, no.3, pp.228 - 230, 2010-03 |
| Hot-carrier lifetime dependence on channel width and silicon recess depth in N-channel metal-oxide-semiconductor field-effect-transistors with the recessed local oxidation of silicon isolation structure Chim, WK; Cho, Byung Jin; Yue, JMP, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS, v.41, no.1, pp.47 - 53, 2002-01 |
| Hydrogen Defect Passivation of Silicon Transistor on Plastic for High Performance Flexible Device Application Hasan, Musarrat; Yun, Sun Jin; Koo, Jae Bon; Park, Sang Hee Ko; Kim, Yong Hae; Kang, Seung Youl; Rho, Jonghyun; et al, ELECTROCHEMICAL AND SOLID STATE LETTERS, v.13, no.3, pp.80 - 82, 2010 |
| Impact of interfacial layer control using Gd2O3 in HfO2 gate dielectric on GaAs Dalapati, Goutam Kumar; Tong, Yi; Loh, Wei Yip; Mun, Hoe Keat; Cho, Byung Jin, APPLIED PHYSICS LETTERS, v.90, no.18, 2007-04 |
| Investigation of Self-Heating Effects in Gate-All-Around MOSFETs With Vertically Stacked Multiple Silicon Nanowire Channels Park, Jun-Young; Lee, Byung-Hyun; Chang, Ki Soo; Kim, Dong Uk; Jeong, Chanbae; Kim, Choong-Ki; Bae, Hagyoul; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.11, pp.4393 - 4399, 2017-11 |
| Investigation of the source-side injection characteristic of a dopant-segregated Schottky barrier metal-oxide-semiconductor field-effect-transistor Kim, Sung-Ho; Choi, Sung-Jin; Jang, Moon-Gyu; Choi, Yang-Kyu, APPLIED PHYSICS LETTERS, v.95, no.6, 2009-08 |
| Investigation on Schottky barrier MOSFET for 3D memory application = 3D 메모리 소자 응용을 위한 Schottky barrier MOSFET에 관한 연구link Choi, Sung-Jin; 최성진; et al, 한국과학기술원, 2008 |
| Investigation on the MOSFET with underlap structure for bio sensor application = 바이오 센서 응용을 위한 Underlap 구조의 MOSFET에 관한 연구link Lee, Kwang-Won; 이광원; et al, 한국과학기술원, 2010 |
| Lateral profiling of gate dielectric damage by off-state stress and positive-bias temperature instability Lee, Geon-Beom; Kim, Choong-Ki; Bang, Tewook; Yoo, Min-Soo; Choi, Yang-Kyu, MICROELECTRONICS AND RELIABILITY, v.127, pp.114383, 2021-12 |
| Local Electro-Thermal Annealing for Repair of Total Ionizing Dose-Induced Damage in Gate-All-Around MOSFETs Park, Jun-Young; Moon, Dong-Il; Bae, Hagyoul; Roh, Young Tak; Seol, Myeong-Lok; Lee, Byung-Hyun; Jeon, Chang-Hoon; et al, IEEE ELECTRON DEVICE LETTERS, v.37, no.7, pp.843 - 846, 2016-07 |
| Low leakage and high performance of nMOSFET using SiGe layer as a diffusion barrier Mheen, B; Song, YJ; Kang, JY; Shim, KH; Hong, Songcheol, MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, v.7, no.4-6, pp.375 - 378, 2004-08 |
| Low-Frequency Noise Characteristics Under the OFF-State Stress Lee, Geon-Beom; Kim, Choong-Ki; Yoo, Min-Soo; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.67, no.10, pp.4366 - 4371, 2020-10 |
| Lowering of Schottky Barrier Height in a MOSFET by Deuterium Annealing Yu, Jiman; Wang, Dong-Hyun; Han, Joon-Kyu; Yun, Seong-Yun; Park, Jun-Young; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.44, no.7, pp.1032 - 1035, 2023-07 |
| Lowering the effective work function via oxygen vacancy formation on the GeO2/Ge interface Lee, Tae In; Seo, Yujin; Moon, Jung Min; Ahn, Hyunjun; Yu, Hyun-Young; Hwang, Wan Sik; Cho, Byung Jin, SOLID-STATE ELECTRONICS, v.130, pp.57 - 62, 2017-04 |
| Modeling and simulation study on the nano-scaled schottky-barrier junction and MOSFETs = 나노 수준의 크기를 갖는 쇼트키 배리어 접합 구조와 모스펫에 대한 모델링 및 시뮬레이션 연구link Lee, Jaehyun; 이재현; et al, 한국과학기술원, 2016 |
| Moores law lives on - Ultra-thin body SOI and FinFET CMOS transistors look to continue Moores law for many years to come Chang, LL; Choi, Yang-Kyu; Kedzierski, J; Lindert, N; Xuan, PQ; Bokor, J; Hu, CM; et al, IEEE CIRCUITS DEVICES, v.19, no.1, pp.35 - 42, 2003-01 |
| MOSFET을 이용한 우리별 1호에서의 total dose effect 연구 = Study of the total dose effect measured on KITSAT-1 using the MOSFET detectorlink 이대희; Lee, Dae-Hee; et al, 한국과학기술원, 1997 |
| Nanoscale CMOS spacer FinFET for the terabit era Choi, Yang-Kyu; King, TJ; Hu, CM, IEEE ELECTRON DEVICE LETTERS, v.23, no.1, pp.25 - 27, 2002-01 |
| Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu, APPLIED PHYSICS LETTERS, v.100, no.9, 2012-02 |
| Performance Assessment of III-V Channel Ultra-Thin-Body Schottky-Barrier MOSFETs Lee, Jaehyun; Shin, Mincheol, IEEE ELECTRON DEVICE LETTERS, v.35, no.7, pp.726 - 728, 2014-07 |
| Quantum simulation of device characteristics of silicon nanowire FETs Shin, Mincheol, IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.6, no.2, pp.230 - 237, 2007-03 |
| Quantum simulation of nano-scale MOSFETs in the ballistic transport region = 나노 MOSFET 에서의 전자의 탄도전소에 대한 양자 시뮬레이션link Choi, Hyun-Hwan; 최현환; et al, 한국정보통신대학교, 2005 |
| Quantum transport of holes in 1D, 2D, and 3D devices: the k center dot p method Shin, Mincheol, JOURNAL OF COMPUTATIONAL ELECTRONICS, v.10, no.1-2, pp.44 - 50, 2011-06 |
| RF noise modeling of MOSFETslink Choi, Jeong-Ki; 최정기; et al, 한국정보통신대학원대학교, 2000 |
| Self-Curable Gate-All-Around MOSFETs Using Electrical Annealing to Repair Degradation Induced From Hot-Carrier Injection Park, Jun-Young; Moon, Dong-Il; Seol, Myeong-Lok; Kim, Choong-Ki; Jeon, Chang-Hoon; Bae, Hagyoul; Bang, Tewook; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.63, no.3, pp.910 - 915, 2016-03 |
| Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors Choi, Sung-Jin; Moon, Dong-Il; Kim, Sung-Ho; Duarte, Juan P.; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.32, no.2, pp.125 - 127, 2011-02 |
| Significance of gate oxide thinning below 1.5 nm on 1/f noise behavior in n-channel metal-oxide-semiconductor field-effect transistors under electrical stress Mheen, B; Kim, M; Song, YJ; Hong, Songcheol, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, v.45, no.6A, pp.4943 - 4947, 2006-06 |
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