Showing results 1 to 14 of 14
A 2.74-pJ/bit, 17.7-Gb/s Iterative Concatenated-BCH Decoder in 65-nm CMOS for NAND Flash Memory Lee, Youngjoo; Yoo, Hoyoung; Jung, Jaehwan; Jo, Jihyuck; Park, In-Cheol, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.48, no.10, pp.2531 - 2540, 2013-10 |
Area-efficient method to approximate two minima for LDPC decoders Jung, Jaehwan; Lee, Youngjoo; Park, In-Cheol, ELECTRONICS LETTERS, v.50, no.23, pp.1701 - 1702, 2014-11 |
Area-optimized Syndrome Calculation for ReedSolomon Decoder Lee, Youngjoo; Park, In-Cheol; Yoo, Hoyoung, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.5, pp.609 - 615, 2018-10 |
Efficient Parallel Architecture for Linear Feedback Shift Registers Jung, Jaehwan; Yoo, Hoyoung; Lee, Youngjoo; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.62, no.11, pp.1068 - 1072, 2015-11 |
Energy-Efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages Hwang, Seokha; Moon, Seungsik; Jung, Jaehwan; Kim, Daesung; Park, In-Cheol; Ha, Jeongseok; Lee, Youngjoo, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, v.66, no.11, pp.4462 - 4475, 2019-11 |
Energy-Scalable 4KB LDPC Decoding Architecture for NAND-Flash-Based Storage Systems Lee, Youngjoo; Jung, Jaehwan; Park, In-Cheol, IEICE TRANSACTIONS ON ELECTRONICS, v.E99C, no.2, pp.293 - 301, 2016-02 |
High-Throughput and Low-Complexity BCH Decoding Architecture for Solid-State Drives Lee, Youngjoo; Yoo, Hoyoung; Yoo, Injae; Park, In-Cheol, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.22, no.5, pp.1183 - 1187, 2014-05 |
Low-Complexity Beamforming Optimization for IRS-Aided MU-MIMO Wireless Systems Moon, Seungsik; Lee, Hyeongtaek; Choi, Junil; Lee, Youngjoo, IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, v.71, no.5, pp.5587 - 5592, 2022-05 |
Low-Complexity Parallel Chien Search Structure Using Two-Dimensional Optimization Lee, Youngjoo; Yoo, Hoyoung; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.58, no.8, pp.522 - 526, 2011-08 |
Low-Complexity Tree Architecture for Finding the First Two Minima Lee, Youngjoo; Kim, Bongjin; Jung, Jaehwan; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.62, no.1, pp.61 - 64, 2015-01 |
Low-Power Parallel Chien Search Architecture Using a Two-Step Approach Yoo, Hoyoung; Lee, Youngjoo; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.3, pp.269 - 273, 2016-03 |
Massive MIMO Systems With Low-Resolution ADCs: Baseband Energy Consumption vs. Symbol Detection Performance Moon, Seungsik; Kim, In-Soo; Kam, Dongyun; Jee, Dong-Woo; Choi, Junil; Lee, Youngjoo, IEEE ACCESS, v.7, pp.6650 - 6660, 2019-01 |
Mismatch-tolerant Capacitor Array Structure for Junction-splitting SAR Analog-to-digital Conversion Lee, Youngjoo; Oh, Taehyoun; Park, In-Cheol, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.17, no.3, pp.387 - 400, 2017-06 |
Single-step glitch-free NAND-based digitally controlled delay lines using dual loops Lee, Youngjoo; Park, In-Cheol, ELECTRONICS LETTERS, v.50, no.13, pp.930 - 931, 2014-06 |
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