Low-Complexity Tree Architecture for Finding the First Two Minima

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This brief presents an area-efficient tree architecture for finding the first two minima as well as the index of the first minimum, which is essential in the design of a low-density parity-check decoder based on the min-sum algorithm. The proposed architecture reduces the number of comparators by reusing the intermediate comparison results computed for the first minimum in order to collect the candidates of the second minimum. As a result, the proposed tree architecture improves the area-time complexity remarkably.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2015-01
Language
English
Article Type
Article
Keywords

VALUES

Citation

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.62, no.1, pp.61 - 64

ISSN
1549-7747
DOI
10.1109/TCSII.2014.2362663
URI
http://hdl.handle.net/10203/195203
Appears in Collection
EE-Journal Papers(저널논문)
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