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Park, In-Cheol (박인철)
교수, (전기및전자공학부)

http://ics.kaist.ac.kr

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    NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
    1
    High-Speed Counter with Novel LFSR State Extension

    Bae, Hyungjoon; Hyun, Yujin; Kim, Suchang; et al, IEEE TRANSACTIONS ON COMPUTERS, v.72, no.3, pp.893 - 899, 2023-03

    2
    Multi-Mode QC-LDPC Decoding Architecture With Novel Memory Access Scheduling for 5G New-Radio Standard

    Lee, Seongjin; Park, Sangsoo; Jang, Boseon; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.69, no.5, pp.2035 - 2048, 2022-05

    3
    In Situ Multi-Bit Decision for Successive Cancellation List Decoding of Polar Codes

    Park, Jaehyeon; Lee, Jaeyoung; Park, In-Cheolresearcher, IEEE ACCESS, v.10, pp.86943 - 86952, 2022

    4
    Interleaved Local Sorting for Successive Cancellation List Decoding of Polar Codes

    Kim, Wooyoung; Hyun, Yujin; Lee, Jaeyoung; et al, IEEE ACCESS, v.9, pp.128623 - 128632, 2021-09

    5
    Constant-Time Synchronous Binary Counter With Minimal Clock Period

    Hyun, Yujin; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.68, no.7, pp.2645 - 2649, 2021-07

    6
    Real-Time SSDLite Object Detection on FPGA

    Suchang Kim; Na, Seungho; Kong, Byeong Yong; et al, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.29, no.6, pp.1192 - 1205, 2021-06

    7
    Hybrid Convolution Architecture for Energy-Efficient Deep Neural Network Processing

    Kim, Suchang; Jo, Jihyuck; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.68, no.5, pp.2017 - 2029, 2021-05

    8
    Large-Small Sorting for Successive Cancellation List Decoding of Polar Codes

    Lee, Kyungpil; Park, In-Cheolresearcher, IEEE ACCESS, v.8, pp.96955 - 96962, 2020-05

    9
    A 120-mW 0.16-ms-Latency Connectivity-Scalable Multiuser Detector for Interleave Division Multiple Access

    Kong, Byeong Yong; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.3, pp.470 - 474, 2020-03

    10
    Retrain-Less Weight Quantization for Multiplier-Less Convolutional Neural Networks

    Choi, Jaewoong; Kong, Byeong Yong; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.3, pp.972 - 982, 2020-03

    11
    A Low-Latency Multi-Touch Detector Based on Concurrent Processing of Redesigned Overlap Split and Connected Component Analysis

    Kong, Byeong Yong; Lee, Jooseung; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.1, pp.166 - 176, 2020-01

    12
    Energy-Efficient Symmetric BC-BCH Decoder Architecture for Mobile Storages

    Hwang, Seokha; Moon, Seungsik; Jung, Jaehwan; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, v.66, no.11, pp.4462 - 4475, 2019-11

    13
    Modified Viterbi Scoring for HMM-Based Speech Recognition

    Jo, Jihyuck; Kim, Han-Gyu; Park, In-Cheolresearcher; et al, INTELLIGENT AUTOMATION AND SOFT COMPUTING, v.25, no.2, pp.351 - 358, 2019-06

    14
    Energy-efficient Convolution Architecture Based on Rescheduled Dataflow

    Jo, Jihyuck; Kim, Suchang; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.65, no.12, pp.4196 - 4207, 2018-12

    15
    A Memory-Efficient IDMA Architecture Based on On-the-Fly Despreading

    Kong, Byeong Yong; Park, In-Cheolresearcher, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.11, pp.3327 - 3337, 2018-11

    16
    Hybrid Sorting Architecture for Low-latency Successive Cancellation List Decoding of Polar Codes

    Kong, Byeong Yong; Park, In-Cheolresearcher, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.5, pp.593 - 601, 2018-10

    17
    Area-optimized Syndrome Calculation for ReedSolomon Decoder

    Lee, Youngjoo; Park, In-Cheolresearcher; Yoo, Hoyoung, JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.5, pp.609 - 615, 2018-10

    18
    A Fast Successive Cancellation List Decoder for Polar Codes With an Early Stopping Criterion

    Kim, Daesung; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON SIGNAL PROCESSING, v.66, no.18, pp.4971 - 4979, 2018-09

    19
    Fast Low-Complexity Triple-Error-Correcting BCH Decoding Architecture

    Kim, Daesung; Yoo, Injae; Park, In-Cheolresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.6, pp.764 - 768, 2018-06

    20
    DSIP: A Scalable Inference Accelerator for Convolutional Neural Networks

    Jo, Jihyuck; Cha, Soyoung; Rho, Dayoung; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.2, pp.605 - 618, 2018-02
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