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Browse "EE-Conference Papers(학술회의논문)" by Author Pak, J.S.

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Showing results 1 to 17 of 17

1	A frequency tunable resonant clock distribution scheme using bond-wire inductor Lee, W.; Pak, J.S.; Pak, J.; Ryu, C.; Park, J.; Kim, Joungho, 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008, pp.24 - 26, IEEE, 2008-12-10
2	Active circuit to through silicon via (TSV) noise coupling Cho, J.; Shim, J.; Song, E.; Pak, J.S.; Lee, J.; Lee, H.; Kim, Joungho, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.97 - 100, IEEE, 2009-10-19
3	An estimation method of chip level power distribution network inductance using full wave simulation and segmentation method Kim, J.; Shim, J.; Lee, W.; Pak, J.S.; Kim, Joungho, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.339 - 342, 2008-05-19
4	Analysis of power distribution network in TSV-based 3D-IC Kim, K.; Lee, W.; Kim, J.; Song, T.; Kim, J.; Pak, J.S.; Kim, Joungho; et al, 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.177 - 180, IEEE, 2010-10-25
5	Characterization of SSN coupling to signal via in multi-layer PCBs and packages Park, J.; Kim, H.; Pak, J.S.; Kim, Joungho, 17th International Zurich Symposium on Electromagnetic Compatibility, 2006, pp.328 - 331, IEEE, 2006-02-27
6	Coupling of through-hole signal via to power/ground resonance and excitation of edge radiation in multi-layer PCB Pak, J.S.; Kim, J.; Lee, H.; Byun, J.-G.; Kim, Joungho, 2003 IEEE Symposium on Electromagnetic Compatibility, pp.231 - 235, IEEE, 2003-08-18
7	Differential signal via shield with narrow via pitch partial electromagnetic bandgap structure Hwang, C.; Shin, M.; Pak, J.S.; Kim, Joungho, 2010 IEEE International Symposium on Electromagnetic Compatibility, EMC 2010, pp.451 - 454, IEEE, 2010-07-25
8	Electrical characterization of Trough Silicon Via (TSV) depending on structural and material parameters based on 3D full wave simulation Pak, J.S.; Ryu, C.; Kim, Joungho, International Conference on Electronic Materials and Packaging, EMAP 2007, IEEE, 2007-11-19
9	Guard ring effect for Through Silicon Via (TSV) noise coupling reduction Cho, J.; Yoon, K.; Pak, J.S.; Kim, J.; Lee, J.; Lee, H.; Park, K.; et al, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24
10	I/O power estimation and analysis of high-speed channels in Through-Silicon Via (TSV)-based 3D IC Kim, Joungho; Cho, J.; Pak, J.S.; Song, T.; Kim, J.; Lee, H.; Lee, J.; et al, 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.41 - 44, IEEE, 2010-10-25
11	Modeling and analysis of differential signal Through Silicon Via (TSV) in 3D IC Kim, J.; Pak, J.S.; Cho, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24
12	Noise coupling to signal trace and via from power/ground simultaneous switching noise in high speed double data rates memory module Park, J.; Kim, H.; Pak, J.S.; Jeong, Y.; Baek, S.; Kim, Joungho; Lee, J.-J.; et al, 2004 International Symposium on Electromagnetic Compatibility, EMC 2004, pp.592 - 597, IEEE, 2004-08-09
13	PCB power/ground plane edge radiation excited by high-frequency clock Pak, J.S.; Kim, H.; Kim, Joungho; Lee, H., 2004 International Symposium on Electromagnetic Compatibility, EMC 2004, pp.197 - 202, IEEE, 2004-08-09
14	Sharing power distribution networks for enhanced power integrity by using through-silicon-via Pak, J.S.; Kim, Joungho; Lee, J.; Lee, H.; Park, K.; Kim, J., 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008, pp.9 - 12, IEEE, 2008-12-10
15	Through silicon via (TSV) equalizer Kim, Joungho; Song, E.; Cho, J.; Pak, J.S.; Lee, J.; Lee, H.; Kim, J., 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.13 - 16, 123, 2009-10-19
16	Through Silicon Via (TSV) shielding structures Cho, J.; Kim, Joungho; Song, T.; Pak, J.S.; Kim, J.; Lee, H.; Lee, J.; et al, 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.269 - 272, IEEE, 2010-10-25
17	Wideband low power distribution network impedance of high chip density package using 3-D stacked through silicon vias Pak, J.S.; Ryu, C.; Kim, J.; Shim, Y.; Kim, G.; Kim, Joungho, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.351 - 354, IEEE, 2008-05-19

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