Effects of gate bias stress on the electrical characteristics of ZnO thin film transistor

Abstract

The electrical stability of ZnO thin film transistors (TFTs) has been investigated. The results of stress test on a ZnO TFT differed from those on an a-Si:H TFT. Therefore, the instability of the ZnO TFT cannot be explained with the conventional degradation mechanisms of an a-Si:H TFT. We fabricated ZnO TFTs by varying key factors related to the electrical stability. With the results of various bias tests, possible mechanisms for the abnormal behavior under gate bias stress are discussed.