Browse "School of Electrical Engineering(전기및전자공학부)" by Subject NM
Showing results 10 to 16 of 16
| Schottky Tunneling Effects in a Tunnel FET Hur, Jae; Jeong, Woo Jin; Shin, Mincheol; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.12, pp.5223 - 5229, 2017-12 |
| Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors Choi, Sung-Jin; Moon, Dong-Il; Kim, Sung-Ho; Duarte, Juan P.; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.32, no.2, pp.125 - 127, 2011-02 |
| Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era Choi, Yang-Kyu; King, TJ; Hu, CM, SOLID-STATE ELECTRONICS, v.46, no.10, pp.1595 - 1601, 2002-10 |
| Surface plasmon-assisted nano-lithography with a perfect contact aluminum mask of a hexagonal dot array Kim, Eun Sung; Kim, Yong Min; Choi, Kyung Cheol, PLASMONICS, v.11, no.5, pp.1337 - 1342, 2016-10 |
| The Effect of the Ratio of Lines to Spaces for Nanolithography Using Surface Plasmons Kim, Eun Sung; Choi, Kyung Cheol, IEEE TRANSACTIONS ON NANOTECHNOLOGY, v.13, no.2, pp.203 - 207, 2014-03 |
| Vertically Integrated Multiple Nanowire Field Effect Transistor Lee, Byung Hyun; Kang, Min Ho; Ahn, Dae Chul; Park, Jun Young; Bang, Tewook; Jeon, Seung Bae; Hur, Jae; et al, NANO LETTERS, v.15, no.12, pp.8056 - 8061, 2015-12 |
| Vertically Integrated Nanowire-Based Unified Memory Lee, Byung-Hyun; Ahn, Dae-Chul; Kang, Min-Ho; Jeon, Seung-Bae; Choi, Yang-Kyu, NANO LETTERS, v.16, no.9, pp.5909 - 5916, 2016-09 |
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