Browse by Subject series resistance
Showing results 1 to 9 of 9
| A simple model parameter extraction methodology for an on-chip spiral inductor Oh, NJ; Lee, Sang-Gug, ETRI JOURNAL, v.28, pp.115 - 118, 2006-02 |
| A simple wide-band on-chip inductor model for silicon-based RF ICs Gil, J; Shin, Hyung-Cheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.51, pp.2023 - 2028, 2003-09 |
| Extremely scaled 3-dimensional multiple-gate technologies for terabit era Choi, Yang-Kyu; Kim, Kuk-Hwan; Han, Jin-Woo; Ryu, Seong-Wan; Lee, Hyunjin, JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.7, no.11, pp.4126 - 4130, 2007-11 |
| Highly Biased Linear Condition Method for Separately Extracting Source and Drain Resistance in MOSFETs Kim, Gun-Hee; Bae, Hagyoul; Hur, Jae; Kim, Choong-Ki; Lee, Geon-Beom; Bang, Tewook; Son, Yoon-Ik; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.2, pp.419 - 423, 2018-02 |
| Hot-carrier effects in FinFETs = FinFETs의 Hot-Carrier 효과link Han, Jin-Woo; 한진우; et al, 한국과학기술원, 2006 |
| Reply to Comments by Ortiz-Conde et al. Kim, Gun-Hee; Bae, Hagyoul; Hur, Jae; Kim, Choong-Ki; Lee, Geon-Bum; Bang, Tewook; Choi, Yang-Kyu, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.9, pp.4022 - 4024, 2018-09 |
| Separate extraction of source/drain resistances in ultra-thin body SOI MOSFET with underlap structure = SOI 기반의 언더랩 구조를 가지는 MOSFET의 소스/드레인 저항 분리 추출에 관한 연구link Kim, Yong Yoon; 김용윤; et al, 한국과학기술원, 2015 |
| $SiN_x$ Sidewall 공정을 이용한 Self-aligned RTD의 개발 = Development of self-aligned RTDs using a $SiN_x$ sidewall processlink 이호연; Lee, Ho-Yeon; et al, 한국과학기술원, 2010 |
| STI edge effect on the series resistance of CMOS Schottky barrier diodes Lee, Jaelin; Kim, Suna; Hong, Jong-Phil; Lee, Sang-Gug, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.56, no.4, pp.932 - 935, 2014-04 |
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