A novel hierarchical-search block matching algorithm and VLSI architecture considering the spatial complexity of the macroblock

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dc.contributor.authorHan, Tae-Heeko
dc.contributor.authorHwang, SHko
dc.date.accessioned2013-03-03T09:11:14Z-
dc.date.available2013-03-03T09:11:14Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1998-05-
dc.identifier.citationIEEE TRANSACTIONS ON CONSUMER ELECTRONICS, v.44, no.2, pp.337 - 342-
dc.identifier.issn0098-3063-
dc.identifier.urihttp://hdl.handle.net/10203/78136-
dc.description.abstractIn this paper, we propose a novel hierarchical-search block matching algorithm for motion estimation, which adaptively selects an initial search level based on the spatial complexity of a matching block. It relies on a simple computation of pixel intensity variation in the current macroblock. We demonstrate its effectiveness in two aspects: the performance and the computational cost. A hardware architecture and a VLSI realization of this algorithm with half-pel motion estimation and motion compensation are also presented. The proposed algorithm greatly reduces the computations required in the existing hierarchical-search block matching algorithms while achieves virtually identical performance to them.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleA novel hierarchical-search block matching algorithm and VLSI architecture considering the spatial complexity of the macroblock-
dc.typeArticle-
dc.identifier.wosid000074170400017-
dc.identifier.scopusid2-s2.0-0032070549-
dc.type.rimsART-
dc.citation.volume44-
dc.citation.issue2-
dc.citation.beginningpage337-
dc.citation.endingpage342-
dc.citation.publicationnameIEEE TRANSACTIONS ON CONSUMER ELECTRONICS-
dc.contributor.localauthorHwang, SH-
dc.contributor.nonIdAuthorHan, Tae-Hee-
dc.type.journalArticleArticle-
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