A nano-structure memory with SOI edge channel

Abstract

We fabricated nano structure memory with SOI edge channel and a nano dot. The width of the edge channel was determined by the thickness of the recessed top-silicon layer of Silicon-On-Insulator (SOI) wafer and the size of the sidewall nano dot was determined by the Reactive Ion Etching (RIE) and E-Beam lithography. The memory has a threshold voltage shift of about 1 V for maximum programming voltage of 7 V and showed reasonable retention and endurance characteristics.