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| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| An estimation method of chip level power distribution network inductance using full wave simulation and segmentation method Kim, J.; Shim, J.; Lee, W.; Pak, J.S.; Kim, Joungho, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.339 - 342, 2008-05-19 | |
| Sharing power distribution networks for enhanced power integrity by using through-silicon-via Pak, J.S.; Kim, Joungho; Lee, J.; Lee, H.; Park, K.; Kim, J., 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008, pp.9 - 12, IEEE, 2008-12-10 | |
| Wideband low power distribution network impedance of high chip density package using 3-D stacked through silicon vias Pak, J.S.; Ryu, C.; Kim, J.; Shim, Y.; Kim, G.; Kim, Joungho, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.351 - 354, IEEE, 2008-05-19 |
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