Results 11-20 of 30 (Search time: 0.011 seconds).
NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
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Modeling and analysis of coupling between TSVs, metal, and RDL interconnects in TSV-based 3D IC with silicon interposer Yoon, K.; Kim, G.; Lee, W.; Song, T.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2009 11th Electronic Packaging Technology Conference, EPTC 2009, pp.702 - 706, 2009-12-09 | |
Impact of partial EBG PDN on PI, SI and lumped model-based correlation Lee, J.; Lee, H.; Park, K.; Chung, B.; Kim, J.; Kim, Joungho, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.168 - 171, 2008-05-19 | |
Modeling and analysis of die-to-die vertical coupling in 3-D IC Lee, S.; Kim, G.; Kim, J.; Song, T.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2009 11th Electronic Packaging Technology Conference, EPTC 2009, pp.707 - 711, 2009-12-09 | |
A dual-slope signaling scheme to suppress electromagnetic interference (EMI) with sustaining eye margin Yoon, C.; Baek, S.; Lee, H.; Jeong, Y.; Park, J.; Park, H.; Sung, B.; Kim, Joungho, 17th Conference on Electrical Performance of Electronic Packaging, EPEP 2008, pp.143 - 146, 2008-10-27 | |
Guard ring effect for Through Silicon Via (TSV) noise coupling reduction Cho, J.; Yoon, K.; Pak, J.S.; Kim, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24 | |
Modeling and analysis of differential signal Through Silicon Via (TSV) in 3D IC Kim, J.; Pak, J.S.; Cho, J.; Lee, J.; Lee, H.; Park, K.; Kim, Joungho, 2010 IEEE CPMT Symposium Japan, ICSJ10, IEEE, 2010-08-24 | |
Through silicon via (TSV) equalizer Kim, Joungho; Song, E.; Cho, J.; Pak, J.S.; Lee, J.; Lee, H.; Kim, J., 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.13 - 16, 123, 2009-10-19 | |
High frequency electrical model of through wafer via for 3-D stacked chip packaging Ryu, C.; Lee, J.; Lee, H.; Lee, K.; Oh, T.; Kim, Joungho, ESTC 2006 - 1st Electronics Systemintegration Technology Conference, pp.215 - 220, IEEE, 2006-09-05 | |
Analysis of the effect of AC noise on DC bias of VGA for UHF RFID using chip-package co-modeling and simulation Lee, H.; Shim, Y.; Park, H.; Ryu, C.; Yoon, C.; Kim, Joungho, 9th Electronics Packaging Technology Conference, EPTC 2007, pp.591 - 594, IEEE, 2007-12-12 | |
Design of LTCC-based ultra-wideband transmitter SiP using CMOS impulse generator Yoon, C.; Lee, J.; Kim, M.; Park, Y.; Park, H.; Lee, H.; Kim, Joungho, 8th Electronics Packaging Technology Conference, EPTC 2006, pp.85 - 89, IEEE, 2006-12-06 |
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