Showing results 1 to 7 of 7
A Frequency Clock Distribution Scheme Using Bond-Wire Inductor Kim, Joungho; Lee, Woojin; Pak, Jun So; Pak, Jiwoo; Ryu, Chunghyun; Park, Jongbae, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 2008 |
Chip-Package Hybrid Clock Distribution Network and DLL for Low Jitter Clock Delivery Chung, Daehyun; Ryu, Chunghyun; Kim, Hyungsoo; Lee, Choonheung; Kim, Jinhan; Bae, Kicheol; Yu, Jiheon; et al, Solid-state circuits, IEEE Journal of, vol.41. pp. 274-286, 2006-01 |
Data-dependent Jitter using Single Pulse Analysis Method in High-speed Interconnection Kim, Joungho; Song, Eakhwan; Lee, Junho; Kim, Jingook; Kam, Dong Gun; Ryu, Chunghyun, 7th EPTC 2005, pp.810 - 813, 2005 |
Effect of power distribution network design on RF circuit performance for 900MHz RFID reader Kim, Youngwon; Ryu, Chunghyun; Park, Jongbae; Kim, Joungho, 2006 IEEE 8th Electronics Packaging Technology Conference, EPTC, pp.860 - 865, IEEE, 2006-12-06 |
High-frequency Electrical Model of Chip-to-Chip Via Interconnection for 3-D Chip Stacking Package Kim, Joungho; Ryu, Chunghyun; Chung, Daehyun; Lee, Junho; Lee, Kwangyong; Oh, Taesung, IEEE 14th(13) Topical Meeting on Electrical Performance of Electronic Packaging, pp.151 - 154, IEEE, 2005-10 |
Multi-Stacking Through-Silicon-Via Effects on Signal Integrity and Power Integrity for Application of 3-Dimensional Stacked-Chip-Package Kim, Joungho; Pak, Jun So; Ryu, Chunghyun, Presented at XXIX General Assembly of International Union of Radio Science (URSIGA 2008), 2008 |
Quarter-Circle Shaped Plane Cavity Resonator for Skew-Free and Low Jitter Clock Distribution Network Kim, Joungho; Lee, Woojin; Ryu, Chunghyun; Park, Jongbae, Presented at Proceeding of XXIX General Assembly of International Union of Radio Science (URSIGA 2008), 2008 |
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