DSpace at KOASAS: High-frequency Electrical Model of Chip-to-Chip Via Interconnection for 3-D Chip Stacking Package

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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

High-frequency Electrical Model of Chip-to-Chip Via Interconnection for 3-D Chip Stacking Package

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Kim, Joungho researcher / Ryu, Chunghyun / Chung, Daehyun / Lee, Junho / Lee, Kwangyong / Oh, Taesung

Publisher: IEEE

Issue Date: 2005-10

Language: ENG

Citation: IEEE 14th(13) Topical Meeting on Electrical Performance of Electronic Packaging, pp.151 - 154

URI: http://hdl.handle.net/10203/141274

Appears in Collection: EE-Conference Papers(학술회의논문)

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