Low power clock generator based on an area-reduced interleaved synchronous mirror delay scheme
- Publisher
- IEEE
- Issue Date
- 2002-05-26
- Language
- English
- Description
ISCAS.2002
- Citation
2002 IEEE International Symposium on Circuits and Systems, pp.III-671 - III-674
- ISSN
- 0271-4310
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
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