Low power clock generator based on an area-reduced interleaved synchronous mirror delay scheme
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Sung, K. | ko |
| dc.contributor.author | Yang, B.-D. | ko |
| dc.contributor.author | Kim, Lee-Sup | ko |
| dc.date.accessioned | 2007-05-31T02:19:33Z | - |
| dc.date.available | 2007-05-31T02:19:33Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2002-05-26 | - |
| dc.identifier.citation | 2002 IEEE International Symposium on Circuits and Systems, pp.III-671 - III-674 | - |
| dc.identifier.issn | 0271-4310 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/395 | - |
| dc.description | ISCAS.2002 | en |
| dc.description.sponsorship | This work was supported by KOSEF through the MICROS at KAIST, Korea | en |
| dc.language | English | - |
| dc.language.iso | en_US | en |
| dc.publisher | IEEE | - |
| dc.title | Low power clock generator based on an area-reduced interleaved synchronous mirror delay scheme | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000186328000169 | - |
| dc.identifier.scopusid | 2-s2.0-0036292981 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | III-671 | - |
| dc.citation.endingpage | III-674 | - |
| dc.citation.publicationname | 2002 IEEE International Symposium on Circuits and Systems | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Phoenix, AZ | - |
| dc.embargo.liftdate | 9999-12-31 | - |
| dc.embargo.terms | 9999-12-31 | - |
| dc.contributor.localauthor | Kim, Lee-Sup | - |
| dc.contributor.nonIdAuthor | Sung, K. | - |
| dc.contributor.nonIdAuthor | Yang, B.-D. | - |
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