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Kim, Lee-Sup (김이섭)
교수, (전기및전자공학부)

http://mvlsi.kaist.ac.kr

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    NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
    1
    ToEx: Accelerating Generation Stage of Transformer-Based Language Models via Token-Adaptive Early Exit

    Kang, Myeonggu; Park, Junyoung; Shin, Hyein; et al, IEEE TRANSACTIONS ON COMPUTERS, v.73, no.9, pp.2248 - 2261, 2024-09

    2
    ADC-Free ReRAM-Based In-Situ Accelerator for Energy-Efficient Binary Neural Networks

    Kim, Hyeonuk; Jung, Youngbeom; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.73, no.2, pp.353 - 365, 2024-02

    3
    Accelerating Deep Reinforcement Learning via Phase-Level Parallelism for Robotics Applications

    Kim, Yang-Gon; Han, Yunki; Shin, Jaekang; et al, IEEE COMPUTER ARCHITECTURE LETTERS, v.23, no.1, pp.41 - 44, 2024-01

    4
    MGen: A Framework for Energy-Efficient In-ReRAM Acceleration of Multi-Task BERT

    Kang, Myeonggu; Shin, Hyein; Kim, Joon Gyum; et al, IEEE TRANSACTIONS ON COMPUTERS, v.72, no.11, pp.3140 - 3152, 2023-11

    5
    Fault-Free: A Framework for Analysis and Mitigation of Stuck-at-Fault on Realistic ReRAM-Based DNN Accelerators

    Shin, Hyein; Kang, Myeonggu; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.72, no.7, pp.2011 - 2024, 2023-07

    6
    Accelerating On-Device DNN Training Workloads via Runtime Convergence Monitoring

    Choi, Seungkyu; Shin, Jaekang; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.42, no.5, pp.1574 - 1587, 2023-05

    7
    Energy-Efficient CNN Personalized Training by Adaptive Data Reformation

    Jung, Youngbeom; Kim, Hyeonuk; Choi, Seungkyu; et al, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.42, no.1, pp.332 - 336, 2023-01

    8
    EGCN: An Efficient GCN Accelerator for Minimizing Off-Chip Memory Access

    Han, Yunki; Park, Kangkyu; Jung, Youngbeom; et al, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.12, pp.3127 - 3139, 2022-12

    9
    A Framework for Accelerating Transformer-based Language Model on ReRAM-based Architecture

    Kang, Myeonggu; Shin, Hyein; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.41, no.9, pp.3026 - 3039, 2022-09

    10
    S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity

    Kang, Myeonggu; Kim, Hyeonuk; Shin, Hyein; et al, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.6, pp.1291 - 1304, 2022-06

    11
    A Deep Neural Network Training Architecture with Inference-aware Heterogeneous Data-type

    Choi, Seungkyu; Shin, Jaekang; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.5, pp.1216 - 1229, 2022-05

    12
    Rare Computing: Removing Redundant Multiplications from Sparse and Repetitive Data in Deep Neural Networks

    Park, Kangkyu; Choi, Seungkyu; Choi, Yeongjae; et al, IEEE TRANSACTIONS ON COMPUTERS, v.71, no.4, pp.795 - 808, 2022-04

    13
    Quantization-Error-Robust Deep Neural Network for Embedded Accelerators

    Jung, Youngbeom; Kim, Hyeonuk; Choi, Yeongjae; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.2, pp.609 - 613, 2022-02

    14
    Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks

    Seol, Hoseok; Kim, Minhye; Kim, Taesoo; et al, IEEE TRANSACTIONS ON COMPUTERS, v.70, no.4, pp.539 - 551, 2021-04

    15
    CREMON: Cryptography Embedded on the Convolutional Neural Network Accelerator

    Choi, Yeongjae; Sim, Jaehyeong; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.12, pp.3337 - 3341, 2020-12

    16
    An Energy-Efficient Deep Convolutional Neural Network Training Accelerator for In-Situ Personalization on Smart Devices

    Choi, Seungkyu; Sim, Jaehyeong; Kang, Myeonggu; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.55, no.10, pp.2691 - 2702, 2020-10

    17
    A 10.8 Gb/s Quarter-Rate 1 FIR 1 IIR Direct DFE with Non-Time-Overlapping Data Generation for 4:1 CMOS Clockless Multiplexer

    Lee, Daewoong; Lee, Dongil; Kim, Yong-Hun; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.1, pp.67 - 71, 2020-01

    18
    An Energy-Efficient Deep Convolutional Neural Network Inference Processor With Enhanced Output Stationary Dataflow in 65-nm CMOS

    Sim, Jaehyeong; Lee, Somin; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.28, no.1, pp.87 - 100, 2020-01

    19
    DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells

    Choi, Jungwhan; Jang, Jaemin; Kim, Lee-Sup, IEEE TRANSACTIONS ON COMPUTERS, v.68, no.12, pp.1741 - 1754, 2019-12

    20
    A 12 Gb/s 1.59 mW/Gb/s Input-Data-Jitter-Tolerant Injection-Type CDR With Super-Harmonic Injection-Locking in 65-nm CMOS

    Jung, Chongsoo; Lee, Dongil; Kim, Yong-Hun; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.12, pp.1972 - 1976, 2019-12
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