(An) area efficient unified early Z-test for embedded 3D graphics processor

Abstract

As 3D graphics rendering processor requires a large amount of primitives and additional data associated with the primitives to synthesize more realistic and accurate 3D images, memory bandwidth problem has been the major issue in designing a 3D graphics rendering engine. In this paper, we propose an area efficient unified early z-test (EZT) method suitable for embedded 3D graphics processor. The unified EZT unit performs the z-test for a pixel from a tile-based rasterizer by using three depth data of a tile such as Z-Max, Z-Min, and Mask. To validate the proposed method, we use a 3D graphics architecture test simulator. Simulation results for Quake3 3D game show that memory bandwidth in the rasterization pipeline is lowered by 24.8 percent compared to the hierarchical z-buffer and 27.4 percent compared to the mid-texturing method with only a 384 Byte on-chip memory.