DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kim, Lee-Sup | - |
dc.contributor.advisor | 김이섭 | - |
dc.contributor.author | Kim, Hong-Yun | - |
dc.contributor.author | 김홍윤 | - |
dc.date.accessioned | 2011-12-14T02:05:25Z | - |
dc.date.available | 2011-12-14T02:05:25Z | - |
dc.date.issued | 2008 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=297167&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/38550 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2008.2, [ v, 64 p. ] | - |
dc.description.abstract | As 3D graphics rendering processor requires a large amount of primitives and additional data associated with the primitives to synthesize more realistic and accurate 3D images, memory bandwidth problem has been the major issue in designing a 3D graphics rendering engine. In this paper, we propose an area efficient unified early z-test (EZT) method suitable for embedded 3D graphics processor. The unified EZT unit performs the z-test for a pixel from a tile-based rasterizer by using three depth data of a tile such as Z-Max, Z-Min, and Mask. To validate the proposed method, we use a 3D graphics architecture test simulator. Simulation results for Quake3 3D game show that memory bandwidth in the rasterization pipeline is lowered by 24.8 percent compared to the hierarchical z-buffer and 27.4 percent compared to the mid-texturing method with only a 384 Byte on-chip memory. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | 컴퓨터 그래픽스 | - |
dc.subject | 그래픽스 프로세서 | - |
dc.subject | 비지블 라인/표면 알고리즘 | - |
dc.subject | Computer graphics | - |
dc.subject | graphics processors | - |
dc.subject | visible line/surface algorithms | - |
dc.subject | 컴퓨터 그래픽스 | - |
dc.subject | 그래픽스 프로세서 | - |
dc.subject | 비지블 라인/표면 알고리즘 | - |
dc.subject | Computer graphics | - |
dc.subject | graphics processors | - |
dc.subject | visible line/surface algorithms | - |
dc.title | (An) area efficient unified early Z-test for embedded 3D graphics processor | - |
dc.title.alternative | 임베디드 3D 그래픽스 프로세서에 적합한 통합 early Z-test 방법 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 297167/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 020063146 | - |
dc.contributor.localauthor | Kim, Lee-Sup | - |
dc.contributor.localauthor | 김이섭 | - |
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