Method for simulating semiconductor device이종접합 반도체 소자 시뮬레이션 방법

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Provided is a method for simulating a semiconductor device. The method includes extracting a Hamiltonian and an overlap matrix of a semiconductor device using a density functional theory or a tight-binding method, calculating each of Bloch states for each corresponding energy, obtaining a first reduced Hamiltonian and a first reduced overlap matrix with a reduced matrix size, and calculating a final transformation matrix and a final energy band structure in which all of unphysical branches, wherein the semiconductor device includes a source region, a drain region, and a channel region between the source region and the drain region, wherein the channel region includes unit cells, each of which includes different material or has different structure.
Assignee
KAIST
Country
US (United States)
Application Date
2020-11-18
Application Number
16951351
Registration Date
2022-01-18
Registration Number
11227088
URI
http://hdl.handle.net/10203/292368
Appears in Collection
EE-Patent(특허)
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