We report the computer aided design results for a GaSb/InAs broken-gap gate all around nanowire tunneling FET (TFET). In designing, the semi-empirical tight-binding (TB) method using sp3d5s* is used as band structure model to produce the bulk properties. The calculated band structure is cooperated with open boundary conditions (OBCs) and a three-dimensional Schrodinger-Poisson solver to execute quantum transport simulators. We find an device configuration for the operation voltage of 0.3 V which exhibit desired low sub-threshold swing (< 60 mV/dec) by adopting receded gate configuration while maintaining the high current characteristic (I-ON > 100 mu A/mu m) that broken-gap TFETs normally have.