An incremental zoom sturdy MASH ADC

Abstract

This paper introduces a speed-enhanced incremental ADC architecture for high-resolution low-power sensor applications, incorporating a third-order sturdy MASH modulator. Unlike previous sturdy MASH ADCs, owing to the properly modified loop filters in the 2-1 sturdy MASH, the quantization noise of the first noise-shaping loop could be cancelled out. The proposed ADC with a 4b coarse SAR ADC and a 2-1 sturdy MASH modulator is designed for a 0.35um CMOS process. Simulation result achieved an 18b resolution in conversion time of 606 us, consuming 161 uA current under a 3.3 V supply.