DC Field | Value | Language |
---|---|---|
dc.contributor.author | Seo, Ki-Hoon | ko |
dc.contributor.author | Jang, Il Hoon | ko |
dc.contributor.author | Noh, Kyung-Joon | ko |
dc.contributor.author | Ryu, Seung-Tak | ko |
dc.date.accessioned | 2017-12-05T01:34:10Z | - |
dc.date.available | 2017-12-05T01:34:10Z | - |
dc.date.created | 2017-11-27 | - |
dc.date.created | 2017-11-27 | - |
dc.date.created | 2017-11-27 | - |
dc.date.issued | 2017-08-08 | - |
dc.identifier.citation | Circuits and Systems (MWSCAS), 2017 IEEE 60th International Midwest Symposium on Circuits and Systems | - |
dc.identifier.issn | 1558-3899 | - |
dc.identifier.uri | http://hdl.handle.net/10203/227316 | - |
dc.description.abstract | This paper introduces a speed-enhanced incremental ADC architecture for high-resolution low-power sensor applications, incorporating a third-order sturdy MASH modulator. Unlike previous sturdy MASH ADCs, owing to the properly modified loop filters in the 2-1 sturdy MASH, the quantization noise of the first noise-shaping loop could be cancelled out. The proposed ADC with a 4b coarse SAR ADC and a 2-1 sturdy MASH modulator is designed for a 0.35um CMOS process. Simulation result achieved an 18b resolution in conversion time of 606 us, consuming 161 uA current under a 3.3 V supply. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | An incremental zoom sturdy MASH ADC | - |
dc.type | Conference | - |
dc.identifier.wosid | 000424694700254 | - |
dc.identifier.scopusid | 2-s2.0-85034078483 | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | Circuits and Systems (MWSCAS), 2017 IEEE 60th International Midwest Symposium on Circuits and Systems | - |
dc.identifier.conferencecountry | US | - |
dc.identifier.conferencelocation | Tufts University, Boston, MA | - |
dc.contributor.localauthor | Ryu, Seung-Tak | - |
dc.contributor.nonIdAuthor | Seo, Ki-Hoon | - |
dc.contributor.nonIdAuthor | Noh, Kyung-Joon | - |
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