Fabrication of microstructured silicon (mu s-Si) from a bulk Si wafer and its use in the printing of high-performance thin-film transistors on plastic substrates

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In this paper, we report a new fabrication route to generate microstructured, single-crystalline silicon (mu s-Si) ribbons using (1 1 0) silicon. Two different methods were explored for producing these printable structures. This work also introduces a second-process innovation in the fabrication of microstructured semiconductor objects for printed large-area circuits, namely the direct integration of a high-quality, thermally grown silicon dioxide (SiO(2)) layer for use as a gate dielectric in top-gate metal-oxide-silicon field effect transistors. We also demonstrate and characterize a soft, conformable lamination process that considerably enhances the mechanical stability of devices printed on plastic, allowing bending radii as small as 0.8 cm. These structures enable a reduction of the bending strains localized at the device interface. These improvements were fully characterized by finite element simulations of the strain distribution present in a descriptive model of the multilayer laminated circuit.
Publisher
Iop Publishing Ltd
Issue Date
2010-07
Language
English
Article Type
Article
Keywords

FIELD-EFFECT TRANSISTORS; LARGE-AREA; ELECTRONICS; DISPLAYS; MOBILITY; TECHNOLOGY; MECHANISM; CIRCUITS; RIBBONS; ARRAYS

Citation

JOURNAL OF MICROMECHANICS AND MICROENGINEERING, v.20, no.7, pp.075018-1 - 075018-8

ISSN
0960-1317
DOI
10.1088/0960-1317/20/7/075018
URI
http://hdl.handle.net/10203/21988
Appears in Collection
MS-Journal Papers(저널논문)
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