Partial Row Activation for Low-Power DRAM System
- Publisher
- IEEE Computer Society
- Issue Date
- 2017-02-06
- Language
- English
- Citation
IEEE International Symposium on High Performance Computer Architecture, pp.217 - 228
- ISSN
- 2378-203X
- Appears in Collection
- CS-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.