Partial Row Activation for Low-Power DRAM System
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lee, Yebin | ko |
| dc.contributor.author | Kim, Hyeonggyu | ko |
| dc.contributor.author | Hong, Seokin | ko |
| dc.contributor.author | Kim, Soontae | ko |
| dc.date.accessioned | 2017-01-12T08:57:41Z | - |
| dc.date.available | 2017-01-12T08:57:41Z | - |
| dc.date.created | 2016-12-27 | - |
| dc.date.issued | 2017-02-06 | - |
| dc.identifier.citation | IEEE International Symposium on High Performance Computer Architecture, pp.217 - 228 | - |
| dc.identifier.issn | 2378-203X | - |
| dc.identifier.uri | http://hdl.handle.net/10203/218376 | - |
| dc.language | English | - |
| dc.publisher | IEEE Computer Society | - |
| dc.title | Partial Row Activation for Low-Power DRAM System | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 217 | - |
| dc.citation.endingpage | 228 | - |
| dc.citation.publicationname | IEEE International Symposium on High Performance Computer Architecture | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Hilton Austin, TX | - |
| dc.identifier.doi | 10.1109/HPCA.2017.35 | - |
| dc.contributor.localauthor | Kim, Soontae | - |
| dc.contributor.nonIdAuthor | Hong, Seokin | - |
- Appears in Collection
- CS-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.