A Universal Core Model for Multiple-Gate Field-Effect Transistors. Part I: Charge Model

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A universal core model for multiple-gate field-effect transistors (Mug-FETs) is proposed. The proposed charge and drain current models are presented in Parts I and II, respectively. It is first demonstrated that an exact potential profile in the entire channel is not necessary for the derivation of accurate charge models in inversion-mode FETs. With application of this new concept, a universal charge model is derived for Mug-FETs by assuming an arbitrary channel potential profile, which simplifies the mathematical formulation. Thereafter, using the Pao-Sah integral, a drain current model is obtained from the charge model of Part I. The proposed model can be expressed as an explicit and continuous form for all operation regimes; therefore, it is well suited for compact modeling to support fast circuit simulations. The model shows good agreement with 2-D and 3-D numerical simulations for several multiple-gate structures, such as single-gate, double-gate, triple-gate, rectangular gate-all-around, and cylindrical gate-all-around FETs.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2013-02
Language
English
Article Type
Article
Keywords

EQUIVALENT OXIDE THICKNESS; HIGH-KAPPA INSULATORS; DRAIN-CURRENT MODEL; SOI MOSFETS; COMPACT MODEL; CHANNEL; DESIGN

Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.60, no.2, pp.840 - 847

ISSN
0018-9383
DOI
10.1109/TED.2012.2233478
URI
http://hdl.handle.net/10203/173828
Appears in Collection
EE-Journal Papers(저널논문)
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