(A) scale-space processor with two-dimensional cache for real-time object recognition = 실시간 물체 인식을 위한 이차원 캐시 기반 스케일 스페이스 프로세서

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 159
  • Download : 0
A scale-space processor with two-dimensional cache is proposed to achieve real-time object recogni-tion in HD 720p images. Scale-space is the most common concept to achieve scale-invariant property in ob-ject recognition, however its high computation cost and frequent memory access makes it hard to implement a real-time object recognition processor. We employ hierarchical convolution accelerator (HCA) which com-putes multiple convolutions in a single cycle with various kernel sizes. In addition, two-dimensional cache (2D Cache) supports accessing column-wise consecutive data from any image window with reduced area. A pre-fetch controller for the proposed 2D Cache improves the hit rate by exploiting the sequential access pattern of convolution tasks. As a result, the scale-space processor implemented in a 65nm CMOS technology achieves 42.7fps on a HD 720p image and consumes 25.1mW for 30fps real-time operation. It shows 3.22x throughput im-provement, 4.44x power reduction, and 6.25x area reduction compared to the previous state-of-the-arts ob-ject recognition system-on-chips.
Advisors
Yoo, Hoi-Junresearcher유회준researcher
Description
한국과학기술원 :전기및전자공학과,
Publisher
한국과학기술원
Issue Date
2014
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2014.2 ,[iv, 31 p. :]

Keywords

Scale-invariant Feature Transform; Scale-space Theory; Hierarchical Convolution Accelerator; Two-dimensional Cache; Object Recognition; 크기 불변 특징 변환; 크기-공간 이론; 계층적 컨벌루션 가속기; 이차원 캐시; 물체 인식

URI
http://hdl.handle.net/10203/221770
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=657473&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0