DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Yoo, Hoi-Jun | - |
dc.contributor.advisor | 유회준 | - |
dc.contributor.author | Kim, Youchang | - |
dc.contributor.author | 김유창 | - |
dc.date.accessioned | 2017-03-29T02:38:29Z | - |
dc.date.available | 2017-03-29T02:38:29Z | - |
dc.date.issued | 2014 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=657473&flag=dissertation | en_US |
dc.identifier.uri | http://hdl.handle.net/10203/221770 | - |
dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2014.2 ,[iv, 31 p. :] | - |
dc.description.abstract | A scale-space processor with two-dimensional cache is proposed to achieve real-time object recogni-tion in HD 720p images. Scale-space is the most common concept to achieve scale-invariant property in ob-ject recognition, however its high computation cost and frequent memory access makes it hard to implement a real-time object recognition processor. We employ hierarchical convolution accelerator (HCA) which com-putes multiple convolutions in a single cycle with various kernel sizes. In addition, two-dimensional cache (2D Cache) supports accessing column-wise consecutive data from any image window with reduced area. A pre-fetch controller for the proposed 2D Cache improves the hit rate by exploiting the sequential access pattern of convolution tasks. As a result, the scale-space processor implemented in a 65nm CMOS technology achieves 42.7fps on a HD 720p image and consumes 25.1mW for 30fps real-time operation. It shows 3.22x throughput im-provement, 4.44x power reduction, and 6.25x area reduction compared to the previous state-of-the-arts ob-ject recognition system-on-chips. | - |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Scale-invariant Feature Transform | - |
dc.subject | Scale-space Theory | - |
dc.subject | Hierarchical Convolution Accelerator | - |
dc.subject | Two-dimensional Cache | - |
dc.subject | Object Recognition | - |
dc.subject | 크기 불변 특징 변환 | - |
dc.subject | 크기-공간 이론 | - |
dc.subject | 계층적 컨벌루션 가속기 | - |
dc.subject | 이차원 캐시 | - |
dc.subject | 물체 인식 | - |
dc.title | (A) scale-space processor with two-dimensional cache for real-time object recognition | - |
dc.title.alternative | 실시간 물체 인식을 위한 이차원 캐시 기반 스케일 스페이스 프로세서 | - |
dc.type | Thesis(Master) | - |
dc.identifier.CNRN | 325007 | - |
dc.description.department | 한국과학기술원 :전기및전자공학과, | - |
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