Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 24461 to 24480 of 51627
| LOW-POWER HIGHLY-ACCURATE PASSIVE MULTIPHASE CLOCK GENERATION SCHEME BY USING POLYPHASE FILTERS Bae, Hyeon-Min; Won, Hyo Sup; Lee, Joon Young; Park, Jin Ho; Kim, Tae Ho, 2014-07-08 |
| Low-Power Hybrid Structure of Digital Matched Filters for Direct Sequence Spread Spectrum Systems Lee, Sung-Won; Park, In-Cheol, 2003 SoC Design Conference(SDC), pp.169 - 172, 2003-11-05 |
| Low-Power Hybrid Structure of Digital Matched Filters for Direct Sequence Spread Spectrum Systems Lee, SW; Park, In-Cheol, International Conference on Acoustics, Speech, and Signal Processing, pp.II-685 - II-688, IEEE, 2003-04-06 |
| Low-power hybrid turbo decoding based on reverse calculation Choi, HM; Kim, JH; Park, In-Cheol, IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E89A, no.3, pp.782 - 789, 2006-03 |
| Low-power hybrid turbo decoding based on reverse calculation Choi, H.-M.; Kim, J.-H.; Park, In-Cheol, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.2053 - 2056, IEEE, 2006-05-21 |
| Low-power image enhancement accelerator for light and dark adaptation = 명순응 및 암순응을 위한 저전력 화질 개선 가속기link Kwon, Joon-Soo; 권준수; et al, 한국과학기술원, 2011 |
| Low-Power K-band Second Harmonic Balanced VCO IC Using InP Based RTDs Jeong,Y; Choi, S; Yang, Kyounghoon, IEEE International Conference on InP and Related Materials, pp.355 - 357, IEEE, 2010-05 |
| Low-Power LDPC-CC Decoding Architecture Based on the Integration of Memory Banks Yoo, Injae; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.64, no.9, pp.1057 - 1061, 2017-09 |
| Low-power Log-MAP decoding based on reduced metric memory access Lee, DS; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.53, no.6, pp.1244 - 1253, 2006-06 |
| Low-power log-map turbo decoding based on reduced metric memory access Lee, D.-S.; Park, In-Cheol, IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.3167 - 3170, IEEE, 2005-05-23 |
| Low-power low-noise CMOS image sensor using noise-shaping SAR ADC with delta-readout algorithm = 델타-리드아웃 및 노이즈 쉐이핑 기법의 축차 비교형 데이터 변환기를 이용한 저전력 저잡읍 CMOS 이미지 센서link Hwang, Sun-Il; Ryu, Seung-Tak; et al, 한국과학기술원, 2019 |
| Low-power multimedia scheduling using output pre-buffering = 버퍼를 이용한 저전력 멀티미디어 스케줄러link Bae, Geun-Tae; 배근태; et al, 한국과학기술원, 2005 |
| Low-power network-on-chip for high-performance SoC design Lee, Kang-Min; Lee, Se-Joong; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.14, pp.148 - 160, 2006-02 |
| Low-Power Nonvolatile Charge Storage Memory based on MoS2 and an Ultrathin Polymer Tunneling Dielectric Woo, Myung Hoon; Jang, Byung Chul; Choi, Junhwan; Lee, Khang June; Shin, Gwang Hyuk; Seong, Hyejeong; Im, Sung Gap; et al, ADVANCED FUNCTIONAL MATERIALS, v.27, no.43, pp.1703545, 2017-11 |
| Low-power On-chip Voltage Generator/Regulator Design 박철훈, Proc. of KITE Conf. on CAD and VLSI Design, pp.105 - 108, 1996 |
| Low-power OOK transceiver design for spin torque nano oscillator = 스핀 발진기를 위한 저전력 OOK 송수신기 설계link Kang, Sun-Yool; 강선율; et al, 한국과학기술원, 2014 |
| Low-Power Parallel Chien Search Architecture Using a Two-Step Approach Yoo, Hoyoung; Lee, Youngjoo; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.3, pp.269 - 273, 2016-03 |
| Low-power PHEMT MMIC LNA for C-band applications Yuk, JS; Choi, YG; Lee, YS; Park, Chul Soon; Kang, S, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.48, pp.253 - 255, 2006-02 |
| Low-power real-time CNN-based hand tracking hardware for mobile devices = 모바일 디바이스를 위한 CNN기반 저전력 실시간 핸드 트랙킹 하드웨어link Choi, Sung Pill, 한국과학기술원, 2019 |
| Low-Power Real-Time Intelligent SoCs for Smart Machines Kim, Youchang; Hong, Injoon; Park, Seongwook; Yoo, Hoi-Jun, IEEE International System-on-Chip Conference (SOCC2016), IEEE, 2016-09-06 |
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