Browse "School of Electrical Engineering(전기및전자공학부)" by Author 1094

Showing results 1 to 60 of 345

1

10 GHz Differential Line Modeling of Leadframe-type TQFP Package for High-speed Serial Interconnection Systems

Ahn, Seungyoung; Kim, Tae Hong; Kim, Jounghoresearcher, IEEE 7th Workshop on Signal Propagation on Interconnects, pp.43 - 46, IEEE, 2003

2

100GHz Time Domain Measurement Using photoconductive Sampling

Kim, Jounghoresearcher; Lee, J; Lee, H; Lee, J; Kim, W, The Sixth IEEE Inter. Conf. on Terahertz Elec., 1998-09

3

10Gbps backplane design methodology with sensitivity analysis and statistical analysis

Kim, J.; Baek, S.; Park, H.; Kim, S.; Hong, Y.; Lim, D.; Kim, Jounghoresearcher, 7th Electronics Packaging Technology Conference, EPTC 2005, v.1, pp.38 - 42, IEEE, 2005-12-07

4

120-G Hz-Bandwidth Characterization of Microwave Passive Devices Using External Silicon-On-Sapphire Photoconductive Sampling Probe

Kim, Jounghoresearcher; Son, J.; Wakana, S.; Whitaker, J., Ultrafast Electronics and Optoelectronics, pp.224 - 227, 1993

5

3 GHz Wide Frequency Model of Ferrite Bead for Power/Ground Noise Simulation of High-speed PCB

Kim, Jounghoresearcher; Kim, Tae Hong; Lee, Junho; Kim, Hyungsoo, IEEE 11th Topical Meeting on Electrical Performance of Electronic Packaging, pp.217 - 220, IEEE, 2002

6

3 GHz Wide Frequency Model of Surface Mount Technology (SMT) Ferrite Bead for Power/Ground and I/O Line Noise Simulation of High-speed PCB

Kim, Tae Hong; Kim, Hyungsoo; Pak, Jun So; Kim, Jounghoresearcher, IEEE 7th Workshop on Signal Propagation on Interconnects, pp.181 - 284, IEEE, 2010-11-15

7

3-Tesla용 고출력 송수신 수위치와 Microstrip Quad-coupler 의 최적화 설계 및 제작

Kim, Jounghoresearcher; Ryu, Woonghwan; Lee, Heungkyu, MRI학회, MRI학회, 1998

8

32-Back 1Gb DRAM with 1GB/s Bandwidth

Kim, Jounghoresearcher; Yoo, J. H.; Kim, C. H.; Lim, H. K.; Cho, S. I.; You, S. M.; Lim, H. K., 1996 ISSCC Conference, pp.23 - 23, 1996

9

3D strip meander delay line structure for multilayer LTCC-based SiP applications

Kim, G.; Lu A.C.W.; Wei, F.; Wai, L.L.; Kim, Jounghoresearcher, 2008 58th Electronic Components and Technology Conference, ECTC, pp.2081 - 2085, 2008-05-27

10

3GHz Through-Hole Signal Via Model Considering PowedGround Plane Resonance Coupling and Via Neck Effect

Pak, Jun So; Kim, Jounghoresearcher, Electronic Components and Technology Conference, pp.1017 - 1022, 2003-05-27

11

3T MRI 용 spiral Head Coil 개발 및 3 T Birdcage coil 과의 비교 분석

김정호researcher; 박준서; 김종훈; 이종오; 박부식, KSMSM 99, pp.97 -, 1999

12

A 2-dimensional distributed equivalent circuit model of EBG power distribution network

Lee, Junho; Jeong, Youchul; Kim, Jounghoresearcher, 14th Topical Meeting on Electrical Performance of Electronic Packaging 2005, v.2005, pp.115 - 118, IEEE, 2005-10-24

13

A 6.4Gbps On-chip Eye Opening Monitor Circuit for Signal Integrity Analysis of High Speed Channel

Kim, Jounghoresearcher; Shin, Mincheol; Shim, Jongjoo; Kim, Jaemin; Pak, Jun So; Hwang, Chulsoon; Yoon, Changwook; et al, Presented at Proceeding of 2008 IEEE EMC Symposium, pp.1 - 7, 2008-08

14

A chip-package hybrid DLL loop and clock distribution network for low-jitter clock delivery

Chung, D.; Ryu, C.; Kim, H.; Lee, C.; Kim, J.; Kim, J.; Bae, K.; et al, 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.514 - 614, 2005-02-06

15

A Compact On-interposer Passive Equalizer for Chip-to-chip High-speed Data Transmission

Kim, Heegon; Cho, Jonghyun; Kim, Joohee; Kim, Kiyeong; Choi, Sumin; Kim, Jounghoresearcher; Pak, Jun So, 21th Conference on Electrical Performance of Electronic Packaging and Systems, IEEE, 2012-10-23

16

A compact, low-cost, and wide-band passive equalizer design using multi-layer PCB parasitics

Song, E.; Kim, J.; Kim, Jounghoresearcher; Cho, J., 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.165 - 168, IEEE, 2010-10-25

17

A Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm

Kim, Jounghoresearcher; Chung, Chaeho; Lee, Soobum; Kwak, Byungman; Kim, Gawon, China-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems, pp.551 - 556, 2006

18

A Delay Line Circuit Layout For Crosstalk Minimization Using Genetic Algorithm and Experimental Verification

Kim, Jounghoresearcher; Chung, Chaeho; Lee, Soobum; Kwak, Byungman; Kim, Gawon, World Congress on Structural and Multidisciplinary Optimization, 2007

19

A designated clock generation and distribution (DCGD) chip scheme for substrate noise-free 3-D stacked SiP design

Lee, W.; Ryu, C.; Cho, J.; Song, E.; Kim, Jounghoresearcher, 2010 Asia-Pacific Symposium on Electromagnetic Compatibility, APEMC 2010, pp.334 - 337, APEMC 2010, 2010-04-12

20

A dual-slope signaling scheme to suppress electromagnetic interference (EMI) with sustaining eye margin

Yoon, C.; Baek, S.; Lee, H.; Jeong, Y.; Park, J.; Park, H.; Sung, B.; et al, 17th Conference on Electrical Performance of Electronic Packaging, EPEP 2008, pp.143 - 146, 2008-10-27

21

A Fast and Accurate Statistical Eye-diagram Estimation Method for High-speed Channel Including Non-linear Receiver Buffer Circuit

Kim, Jounghoresearcher; Kiyeong Kim; Sumin Choi; Hyunsuk Lee; Hyungsoo Kim; Yunsaing Kim, 2015 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2015 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2015-05-26

22

A Fast and Efficient Modeling Method for Chip-Package-PCB Hierarchical Power Distribution Network

Kim, Jounghoresearcher; Kim, Jaemin; Shim, Jongjoo; Pak, JunSo, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 2008

23

A Fast and Precise Analytical Eye-diagram Estimation Method for a Channel of a Pair of Differential Microstriplines on PCB with Arbitrary Terminations

Kim, Jounghoresearcher; Cho, Jeonghyeon; Song, Eakhwan; Shim, Jongjoo; Shim, Yujeong, Electrical Design Advanced Packaging & Systems, EDAPS 2009, 2009

24

A fast and precise eye-diagram estimation method for a channel of a pair of differential microstrip lines on PCB with arbitrary terminations

Cho, J.; Song, E.; Shim, J.; Shim, Y.; Kim, Jounghoresearcher, 2009 IEEE Electrical Design of Advanced Packaging and Systems Symposium, EDAPS 2009, 2009-12-02

25

A Frequency Clock Distribution Scheme Using Bond-Wire Inductor

Kim, Jounghoresearcher; Lee, Woojin; Pak, Jun So; Pak, Jiwoo; Ryu, Chunghyun; Park, Jongbae, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 2008

26

A frequency tunable resonant clock distribution scheme using bond-wire inductor

Lee, W.; Pak, J.S.; Pak, J.; Ryu, C.; Park, J.; Kim, Jounghoresearcher, 2008 Electrical Design of Advanced Packaging and Systems Symposium, IEEE EDAPS 2008, pp.24 - 26, IEEE, 2008-12-10

27

A Low-Cost and High-density RF Multi-chip Module Tranceiver For 1.8 GHz Personal Communication Service

Kim, Jounghoresearcher; Ryu, Woonghwan; Kim, Jonghoon; Kim, Namhoon; Kim, Hyungsoo; Ahn, Seungyoung; Kim, Sungil; et al, IEEE ECTC Conference, IEEE, 2000

28

A MLGA Connector for High speed and High Density

Kim, Jounghoresearcher; Kim, Young Soo; Choi, Hyung Seok; Ko, Youngwoo; Bang, Hyo Jae; Kim, Woo Kyung; Baek, Seungyong; et al, HD International 2001 (The International Conference and Exhibition on High Density Interconnect and Systems packaging), 2001

29

A New 3.0T Hybrid-Spiral-Birdcage (HSB) Coil for Improved Homigeneity Along Z-Axis

Kim, Jounghoresearcher; Park, Jun So; Kim, Jonghoon; Lee, Jong-O; Park, Bu-sik; Jung, Seung-Pil; Jung, Kwan-jin, International Society for Magneitc Resonance of Imaging, 2000

30

A New Graduate Packaging Course in Electronics Course in Electronics - High-speed Digital Interconnection and Packaging

Kim, Jounghoresearcher, 2nd International Academic Conference on Packaging, 1999-03

31

A Noise Coupling Effect on Reference Voltage Level of Triggering Circuit in Non-coherent UWB Communication System

Kim, Jounghoresearcher; Yoon, Changwook; Shin, Minchul; Shim, Yujeong; Kim, Myunghoi; Cho, Jeonghyeon, EMC Kyoto Symposium, 2009

32

A Novel Free-Standing Absolute-Voltage Probe with 2.3 ps Resolution and 1-Microvolt Sensitivity

Kim, Jounghoresearcher; Williamson, S.; Nees, J.; Wakana, S., 8th International Conference on Ultrafast Phenomena, pp.496 - 496, 1992

33

A Novel radio Frequency Clocking Scheme for Over GHz Digital Two-Phase Clock Distribution

Kim, Jounghoresearcher, IMAPS Advanced Technology Workshop on Next Generation IC & Package Design, 1999-07-15

34

A Novel Time domain Picosecond Pulse Sampling System for Non-contact Characterization of Liquids Semiconductors, and Metals

Kim, Jounghoresearcher; Kim, Woopoung; Ryu, aeyoung; Lee, Heeseok, CLEO/Pacific Rim '99, pp.791 - 792, 1999

35

A Novel Twisted Differential Line for High-speed On-chip Interconnections with Reduced Crosstalk

Kim, Jounghoresearcher; Kam, Dong Gun; Ahn, Seungyoung; Baek, Seungyong; Park, Bongcheol; Sung, Myunghee, IEEE 4th Electronics Packaging Technology Conference, pp.180 - 183, IEEE, 2002

36

A Novel Twisted Differential Line on PCB: Crosstalk Model and Its Application to High-speed Interconnect Circuit Design

Kim, Jounghoresearcher; Kam, Dong Gun, IEEE 11th Topical Meeting on Electrical Performance of Electronic Packaging, pp.153 - 156, IEEE, 2002

37

A Precise Analytical Estimation Method of Data-dependent Jitter for High Speed Serial Links with the Consideration of Finite Slew Rate of Input Signal

Cho, Jeonghyeon; Song, Eakhwan; Shim, Jongjoo; Kim, Gawon; Kim, Jiseong; Kim, Jounghoresearcher, 2009 Korea-Japan Joint Conference, pp.215 - 218, 2009

38

A precise analytical eye-diagram estimation method for non-ideal high-speed channels

Cho, J.; Song, E.; Shim, J.; Kim, J.; Kim, Jounghoresearcher, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.159 - 162, IEEE, 2009-10-19

39

A through-silicon-via to active device noise coupling study for CMOS SOI technology

Duan, X.; Gu, X.; Cho, J.; Kim, Jounghoresearcher, 2011 61st Electronic Components and Technology Conference, ECTC 2011, pp.1791 - 1795, ECTC 2011, 2011-05-31

40

A Wide Range CMOS Adaptive Output Drivers for Customized Control of Signal Rise Time and Power/Ground Noise

Kim, Jounghoresearcher, IMAPS Advanced Technology Workshop on Next Generation IC & Package Design, 1999-07

41

Accurate high frequency lossy model of differential signal line including mode-conversion and common-mode propagation effect

Baek, S.; Ahn, S.; Park, J.; Kim, Jounghoresearcher; Kim, J.; Cho, J.-H., 2004 International Symposium on Electromagnetic Compatibility, EMC 2004, v.2, pp.562 - 566, IEEE, 2004-08-09

42

Accurate Measurement of Power/Ground Impedance with Embedded Film Capacitor using Two-port Self-Impedance Measurement Technique

Kim, Hyungsoo; Jeong, Youchul; Park, Joungbae; Lee, SeokKyu; Hong, JongKuk; Hong, Youngsoo; Kim, Jounghoresearcher, IEEE 5th Electronics Packaging Technology Conference, pp.51 - 54, IEEE, 2003-12-10

43

Active circuit to through silicon via (TSV) noise coupling

Cho, J.; Shim, J.; Song, E.; Pak, J.S.; Lee, J.; Lee, H.; Kim, Jounghoresearcher, 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS '09, pp.97 - 100, IEEE, 2009-10-19

44

An Adaptive On-chip ESR Controller Scheme in Power Distribution Network for Simulataneous Switching Noise Reduction

Shim, Jongjoo; Shin, Minchul; Kim, Hyungsoo; Kim, Jounghoresearcher, IEEE Conference on Electrical Performance of Electronic Packaging, pp.169 - 172, IEEE, 2008-11-18

45

An Efficient Crosstalk Parameter Extraction of Embedded Microstrip Structures on High-speed MCM

Kim, Jounghoresearcher; Sung, M; Ryu, W; Kim, H; Kim, Jresearcher, pp.0 - 0, 1999-05

46

An Efficient Hybrid Transmission Line Method (HTLM) for Analysis of Perforated Package Power/Ground Plane

Kim, Jounghoresearcher; Jeong, Youchul; Kim, Hyungsoo; Kim, Jingook; Park, Jongbae, IEEE 11th Topical Meeting on Electrical Performance of Electronic Packaging, pp.179 - 183, IEEE, 2002-10

47

An estimation method of chip level power distribution network inductance using full wave simulation and segmentation method

Kim, J.; Shim, J.; Lee, W.; Pak, J.S.; Kim, Jounghoresearcher, 2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.339 - 342, 2008-05-19

48

An evaluation of differential impedance in PCBs using two single-ended probes only

Kam, D.G.; Lee, H.; Ryu, W.; Kim, J.; Park, B.; Kim, Jounghoresearcher, 6th IEEE Workshop on Signal Propagation on Interconnects, SPI, pp.169 - 171, IEEE, 2002-05-12

49

An On-Chip Signal Integrity Characterization Scheme for Gbps Data Transmission Channel

Kim, Jounghoresearcher; Cho, Jeonghyeon; Song, Eakhwan; Lee, Woojin, Presented at XXIX General Assembly of International Union of Radio Science (URSIGA 2008), 2008

50

An On-Chip Spectrum Analyzer for Signal Integrity

Kim, Jounghoresearcher; Cho, Jeonghyeon; Lee, Woojin; Song, Eakhwan; Shim, Jongjoo; Shin, Minchul; Yoon, Changwook, EMC Kyoto Symposium, 2009

51

An undergraduate class for high-frequency design, fabrication, and measurement

Kim, Jounghoresearcher; Ahn, S.; Park, B.; Chung, Y., Advances in Electronic Packaging, v.3, pp.1827 - 1830, 2001-07-08

52

Analysis and Modeling of Delay and Crosstalk in Differential Meander Delay Line on Based on A Time Domain Mode Impedances

Kim, Jounghoresearcher; Kim, Gawon; Kim, Jaemin; Lee, Sangrok, IEEE Electrical Design of Advanced Packaging and Systems Symposium, 2008

53

Analysis of coupling suppression methods on split power/ground planes using embedded capacitor in multi-layered package

Jeong, Y.; Lu, A.C.W.; Wai, L.L.; Fan, W.; Lok, B.K.; Kim, Jounghoresearcher, 2004 Proceedings - 54th Electronic Components and Technology Conference, v.1, pp.575 - 580, IEEE, 2004-06-01

54

Analysis of DLL Jitter Affected by Power Supply Noise on Power Distribution Network

Kim, Jounghoresearcher; Shin, Minchul; Yoon, Changwook; Cho, Jeonghyeon; Shim, Jongjoo; Shim, Yujeong, EMC Kyoto Symposium, 2009

55

Analysis of EMF Noise from the Receiving Coil Topologies for Wireless Power Transfer

Kim, Jong Hoon; Kim, Hongseok; Kim, Mijoo; Ahn, Seungyoungresearcher; Kim, Ji Seong; Kim Jounghoresearcher, 2012 Asia-Pacific Symposium on Electromagnetic Compatibility, AP-EMC 2012, 2012 Asia-Pacific Symposium on Electromagnetic Compatibility, AP-EMC 2012, 2012-05-22

56

Analysis of Noise Isolation Methods on Split Power/Ground Plane of Multi-layered Package and PCB for Low Jitter Mixed Mode System

Jeong, Youchul; Kim, Hyungsoo; Kim, Jingook; Park, Jongbae; Kim, Jounghoresearcher, IEEE 12th Topical Meeting on Electrical Performance of Electronic Packaging, pp.199 - 202, IEEE, 2003-10-27

57

Analysis of noise suppression techniques using embedded capacitor on split power bus in multi-layer package

Jeong, Y.; Kim, Jounghoresearcher; Lu, A.C.W.; Wai, L.L.; Fan, W.; Lok, B.K.; Wong, C.K., 2004 International Symposium on Electromagnetic Compatibility, EMC 2004, v.1, pp.215 - 220, IEEE, 2004-08-09

58

Analysis of power delivery network constructed by irregular-shaped power/ground plane including densely populated via-hole

Lee, H.; Hong, Y.-S.; Kam, D.; Kim, Jounghoresearcher, Proceedings - 8th IEEE Workshop on Signal Propagation on Interconnects, pp.31 - 34, 2004-05-09

59

Analysis of power distribution network in TSV-based 3D-IC

Kim, K.; Lee, W.; Kim, J.; Song, T.; Kim, J.; Pak, J.S.; Kim, Jounghoresearcher; et al, 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2010, pp.177 - 180, IEEE, 2010-10-25

60

Analysis of Power/Ground Network for Mixed Mode Circuits in Multi-layer PCB

Kim, Jounghoresearcher; Jeong, Y.; Kim, H.; Park, J.; Kim, Jresearcher, 2003 Asia-Pacific Microwave Conference, 2003

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