DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Kun-Sik | ko |
dc.contributor.author | Baik, Kyu-Ha | ko |
dc.contributor.author | Kim, Dong-Pyo | ko |
dc.contributor.author | Woo, Jong-Chang | ko |
dc.contributor.author | No, Kwang-Soo | ko |
dc.contributor.author | Lee, Ki-Jun | ko |
dc.contributor.author | Do, Lee-Mi | ko |
dc.date.accessioned | 2013-03-08T21:34:01Z | - |
dc.date.available | 2013-03-08T21:34:01Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2011-02 | - |
dc.identifier.citation | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.11, no.2, pp.1625 - 1628 | - |
dc.identifier.issn | 1533-4880 | - |
dc.identifier.uri | http://hdl.handle.net/10203/94367 | - |
dc.description.abstract | In this study, we present a spacer patterning technology for sub-30 nm gate template which is used for nano-scale MOSFETs fabrication. A spacer patterning technology using a poly-silicon micro-feature and a chemical vapor deposition (CVD) SiO(2) spacer has been developed, and the sub-30 nm structures by conventional dry etching and chemical mechanical polishing are demonstrated. The minimum-sized features are defined not by the photolithography. but by the CVD film thickness. Therefore, this technology yields a large-area template with critical dimension of minimum-sized features much smaller than that achieved by optical lithography. | - |
dc.language | English | - |
dc.publisher | AMER SCIENTIFIC PUBLISHERS | - |
dc.subject | NANOFABRICATION | - |
dc.title | Sub-30 nm Gate Template Fabrication for Nanoimprint Lithography Using Spacer Patterning Technology | - |
dc.type | Article | - |
dc.identifier.wosid | 000287167900135 | - |
dc.identifier.scopusid | 2-s2.0-84863011434 | - |
dc.type.rims | ART | - |
dc.citation.volume | 11 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 1625 | - |
dc.citation.endingpage | 1628 | - |
dc.citation.publicationname | JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY | - |
dc.identifier.doi | 10.1166/jnn.2011.3379 | - |
dc.contributor.localauthor | No, Kwang-Soo | - |
dc.contributor.nonIdAuthor | Baik, Kyu-Ha | - |
dc.contributor.nonIdAuthor | Kim, Dong-Pyo | - |
dc.contributor.nonIdAuthor | Woo, Jong-Chang | - |
dc.contributor.nonIdAuthor | Lee, Ki-Jun | - |
dc.contributor.nonIdAuthor | Do, Lee-Mi | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordAuthor | Spacer Patterning Technology | - |
dc.subject.keywordAuthor | Nanoimprint Lithography | - |
dc.subject.keywordAuthor | Template | - |
dc.subject.keywordPlus | NANOFABRICATION | - |
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