TSB: A DVS algorithm with quick response for general purpose operating systems

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dc.contributor.authorSeo, Euiseongko
dc.contributor.authorPark, Seonyeongko
dc.contributor.authorKim, Jinsooko
dc.contributor.authorLee, Joonwonko
dc.date.accessioned2013-03-06T13:56:23Z-
dc.date.available2013-03-06T13:56:23Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2008-
dc.identifier.citationJOURNAL OF SYSTEMS ARCHITECTURE, v.54, no.1-2, pp.1 - 14-
dc.identifier.issn1383-7621-
dc.identifier.urihttp://hdl.handle.net/10203/87173-
dc.description.abstractDVS is becoming an essential feature of state-of-the-art mobile processors. Interval-based DVS algorithms are widely employed in general purpose operating systems thanks to their simplicity and transparency. Such algorithms have a few problems, however, such as delayed response, prediction inaccuracies, and underestimation of the performance demand. In this paper we propose TSB (time slice based), a new DVS algorithm that takes advantage of the high transition speeds available in state-of-the-art processors. TSB adjusts processor performance at every context switch in order to match the performance demand of the next scheduled task. The performance demand of a task is predicted by analyzing its usage pattern in the previous time slice. TSB was evaluated and compared to other interval-based power management algorithms oil the Linux kernel. The results show that TSB achieved similar or better energy efficiency compared to existing interval-based algorithms. In addition, TSB dramatically reduced the side effect of prolonging short-term execution times. For a task requiring 50 ins to run without a DVS algorithm, TSB prolonged the execution time by only 6% compared to results of 136% for CPUSpeed and 20% for Ondemand. (C) 2007 Elsevier B.V. All rights reserved.-
dc.languageEnglish-
dc.publisherElsevier Science Bv-
dc.titleTSB: A DVS algorithm with quick response for general purpose operating systems-
dc.typeArticle-
dc.identifier.wosid000256608400002-
dc.identifier.scopusid2-s2.0-42949175555-
dc.type.rimsART-
dc.citation.volume54-
dc.citation.issue1-2-
dc.citation.beginningpage1-
dc.citation.endingpage14-
dc.citation.publicationnameJOURNAL OF SYSTEMS ARCHITECTURE-
dc.identifier.doi10.1016/j.sysarc.2007.03.006-
dc.contributor.localauthorKim, Jinsoo-
dc.contributor.nonIdAuthorSeo, Euiseong-
dc.contributor.nonIdAuthorPark, Seonyeong-
dc.type.journalArticleArticle-
dc.subject.keywordAuthordynamic voltage scaling-
dc.subject.keywordAuthorDVS algorithm-
dc.subject.keywordAuthorlow-power techniques-
dc.subject.keywordAuthorgeneral purpose operating system-
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