Off-state Leakage Currents of MOSFETs with High-k Dielectrics

Abstract

In this research, the off-state leakage current characteristics were studied for different device structures having a high-kappa. dielectric as a gate dielectric and/or a spacer. A guideline to reduce the off-state leakage current is given in terms of the gate dielectric and the spacer structures. Several structures were compared in terms of dielectric constant, equivalent oxide thickness (EOT), and drain-induced barrier lowering (DIBL). The E-field contour, which is responsible for the gate-induced drain leakage (GIDL), was shown. The device structure in which the high-kappa dielectric extends to the bottom of the oxide spacers showed the smallest GIDL current while the device structure in which the interface between the high-kappa gate dielectric and the oxide spacer met at the lightly-doped drain (LDD) region of the silicon substrate showed the best DIBL characteristics. Also, the device structure having a gate dielectric stack of high-kappa gate dielectric/buffer SiO2 spacer was shown to be reasonable for suppressing the GIDL. As the EOT became thinner because of using a high-kappa. dielectric, the off-state leakage current, which was affected by the GIDL current, becomes severe.