A Low-Power CMOS Bluetooth RF Transceiver with a Digital Offset Canceling DLL-Based GFSK Demodulator

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This paper presents a fully integrated 0.18-mum CMOS Bluetooth transceiver. The chip consumes 33 mA in receive mode and 25 mA in transmit mode from a 3-V system supply. The receiver uses a low-IF (3-MHz) architecture, and the transmitter uses a direct modulation with ROM-based Gaussian low-pass filter and I/Q direct digital frequency synthesizer for high level of integration and low power consumption. A new frequency shift keying demodulator based on a delay-locked loop with a digital frequency offset canceller is proposed. The demodulator operates without harmonic distortion, handles up to +/-160-kHz frequency offset, and consumes only 2 mA from a 1.8-V supply. The receiver dynamic range is from -78 dBm to -16 dBm at 0.1% bit-error rate, and the transmitter delivers a maximum of 0 dBm with 20-dB digital power control capability.
Publisher
IEEE-Inst Electrical Electronics Engineers Inc
Issue Date
2003-10
Language
English
Article Type
Article
Keywords

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Citation

IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.38, no.10, pp.1609 - 1618

ISSN
0018-9200
DOI
10.1109/JSSC.2003.817265
URI
http://hdl.handle.net/10203/78338
Appears in Collection
RIMS Journal Papers
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