DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yoo, JH | ko |
dc.contributor.author | Kim, CH | ko |
dc.contributor.author | Lee, KC | ko |
dc.contributor.author | Kyung, KH | ko |
dc.contributor.author | Yoo, SM | ko |
dc.contributor.author | Lee, JH | ko |
dc.contributor.author | Son, MH | ko |
dc.contributor.author | Han, JM | ko |
dc.contributor.author | Kang, BM | ko |
dc.contributor.author | Haq, E | ko |
dc.contributor.author | Lee, SB | ko |
dc.contributor.author | Sim, JH | ko |
dc.contributor.author | Kim, Joungho | ko |
dc.contributor.author | Moon, BS | ko |
dc.contributor.author | Kim, KY | ko |
dc.contributor.author | Park, JG | ko |
dc.contributor.author | Lee, KP | ko |
dc.contributor.author | Lee, KY | ko |
dc.contributor.author | Kim, KN | ko |
dc.contributor.author | Cho, SI | ko |
dc.contributor.author | Park, JW | ko |
dc.contributor.author | Lim, HK | ko |
dc.date.accessioned | 2013-03-02T17:22:12Z | - |
dc.date.available | 2013-03-02T17:22:12Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1996-11 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.31, no.11, pp.1635 - 1644 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/74701 | - |
dc.description.abstract | This paper describes a 32-bank 1 Gb DRAM achieving 1 Gbyte/s (500 Mb/s/DQ pin) data bandwidth and the access time from RAS of 31 ns at V-cc = 2.0 V and 25 degrees C, The chip employs 1) a merged multibank architecture to minimize die area; 2) an extended small swing read operation and a single I/O line driving write scheme to reduce power consumption; 3) a self-strobing I/O schemes to achieve high bandwidth with low power dissipation; and 4) a block redundancy scheme with increased flexibility, The nonstitched chip with an area of 652 mm(2) has been fabricated using 0.16 mu m four-poly, four-metal CMOS process technology. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | 500-MEGABYTE/S | - |
dc.title | A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth | - |
dc.type | Article | - |
dc.identifier.wosid | A1996VR33600009 | - |
dc.identifier.scopusid | 2-s2.0-0030287774 | - |
dc.type.rims | ART | - |
dc.citation.volume | 31 | - |
dc.citation.issue | 11 | - |
dc.citation.beginningpage | 1635 | - |
dc.citation.endingpage | 1644 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.contributor.localauthor | Kim, Joungho | - |
dc.contributor.nonIdAuthor | Yoo, JH | - |
dc.contributor.nonIdAuthor | Kim, CH | - |
dc.contributor.nonIdAuthor | Lee, KC | - |
dc.contributor.nonIdAuthor | Kyung, KH | - |
dc.contributor.nonIdAuthor | Yoo, SM | - |
dc.contributor.nonIdAuthor | Lee, JH | - |
dc.contributor.nonIdAuthor | Son, MH | - |
dc.contributor.nonIdAuthor | Han, JM | - |
dc.contributor.nonIdAuthor | Kang, BM | - |
dc.contributor.nonIdAuthor | Haq, E | - |
dc.contributor.nonIdAuthor | Lee, SB | - |
dc.contributor.nonIdAuthor | Sim, JH | - |
dc.contributor.nonIdAuthor | Moon, BS | - |
dc.contributor.nonIdAuthor | Kim, KY | - |
dc.contributor.nonIdAuthor | Park, JG | - |
dc.contributor.nonIdAuthor | Lee, KP | - |
dc.contributor.nonIdAuthor | Lee, KY | - |
dc.contributor.nonIdAuthor | Kim, KN | - |
dc.contributor.nonIdAuthor | Cho, SI | - |
dc.contributor.nonIdAuthor | Park, JW | - |
dc.contributor.nonIdAuthor | Lim, HK | - |
dc.type.journalArticle | Article; Proceedings Paper | - |
dc.subject.keywordPlus | 500-MEGABYTE/S | - |
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