A Nano-Structure Memory with SOI Edge Channel and a Nano Dot
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | geunsook park | ko |
| dc.contributor.author | sangyeon han | ko |
| dc.contributor.author | taekeun hwang | ko |
| dc.contributor.author | hyungcheol shin | ko |
| dc.date.accessioned | 2013-02-28T04:39:14Z | - |
| dc.date.available | 2013-02-28T04:39:14Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1998-12 | - |
| dc.identifier.citation | JAPANESE JOURNAL OF APPLIED PHYSICS, v.37, no.12B, pp.7190 - 7192 | - |
| dc.identifier.issn | 0021-4922 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/72814 | - |
| dc.description.abstract | We fabricated nano structure memory with silicon on insulator (SOI) edge channel and a nano dot. The width of the edge channel was determined by the thickness of the recessed rep-silicon layer of SOI wafer and the size of sidewall nano dot was determined by the reactive ion etching (RIE) etch and E-beam lithography. The memory has the threshold voltage shift of about 1 V for maximum programming voltage of 7 V and showed reasonable retention and endurance characteristics. | - |
| dc.language | English | - |
| dc.publisher | Japan Soc Applied Physics | - |
| dc.subject | ROOM-TEMPERATURE OPERATION | - |
| dc.subject | SINGLE-ELECTRON MEMORY | - |
| dc.subject | GATE | - |
| dc.title | A Nano-Structure Memory with SOI Edge Channel and a Nano Dot | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000078699200108 | - |
| dc.identifier.scopusid | 2-s2.0-19644374422 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 37 | - |
| dc.citation.issue | 12B | - |
| dc.citation.beginningpage | 7190 | - |
| dc.citation.endingpage | 7192 | - |
| dc.citation.publicationname | JAPANESE JOURNAL OF APPLIED PHYSICS | - |
| dc.contributor.localauthor | hyungcheol shin | - |
| dc.contributor.nonIdAuthor | geunsook park | - |
| dc.contributor.nonIdAuthor | sangyeon han | - |
| dc.contributor.nonIdAuthor | taekeun hwang | - |
| dc.type.journalArticle | Article; Proceedings Paper | - |
| dc.subject.keywordAuthor | SOI | - |
| dc.subject.keywordAuthor | nano-structure memory | - |
| dc.subject.keywordAuthor | nano dot | - |
| dc.subject.keywordAuthor | edge channel | - |
| dc.subject.keywordAuthor | E-beam lithography | - |
| dc.subject.keywordPlus | ROOM-TEMPERATURE OPERATION | - |
| dc.subject.keywordPlus | SINGLE-ELECTRON MEMORY | - |
| dc.subject.keywordPlus | GATE | - |
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