Stability analysis and robust design of polysilicon TFT load 4M SRAM cell by statistical method

Cited 1 time in webofscience Cited 0 time in scopus
  • Hit : 281
  • Download : 0
Advances in high-density static RAM (SRAM) technology have been focused primarily on the application of p-channel polysilicon (poly-Si) thin film transistors (TFTs) as memory cell loads. The penalty, however, is that the electrical characteristics of poly-Si TFTs, such as on-current (I-on), off-current (I-off), subthreshold slope (s) and threshold voltage (V-th), have large variations, a problem which becomes much more serious as the device size is reduced. In this paper we model the relation between SRAM stability and variations in poly-Si TFT characteristics by a statistical method. From our model it is found that grain boundary traps play a more important role than any other parameter. The trap density should be uniform and this requirement becomes severe as the operating voltage is scaled down. It is, however, very difficult to control the grain boundary characteristics of poly-Si TFTs. We propose a robust design method as an indirect but cost-effective solution to parameter fluctuation, based on the Taguchi method of off-line quality control, and assure that the output performance is enhanced without varying the fabrication conditions. (C) 1998 John Wiley & Sons, Ltd.
Publisher
JOHN WILEY & SONS LTD
Issue Date
1998-09
Language
English
Article Type
Article
Citation

QUALITY AND RELIABILITY ENGINEERING INTERNATIONAL, v.14, no.5, pp.357 - 364

ISSN
0748-8017
URI
http://hdl.handle.net/10203/72275
Appears in Collection
RIMS Journal Papers
Files in This Item
There are no files associated with this item.
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 1 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0