VLSI 설계에서 캐리-세이브 가산기를 이용한 설계 블록들 간의 최적화Optimization between Design Blocks using Carry-Save-Adders in VLSI Design

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dc.contributor.author김태환ko
dc.contributor.author엄준형ko
dc.date.accessioned2013-02-27T22:35:16Z-
dc.date.available2013-02-27T22:35:16Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1999-05-
dc.identifier.citation정보과학회논문지(A), v.26, no.5, pp.539 - 626-
dc.identifier.urihttp://hdl.handle.net/10203/71242-
dc.languageKorean-
dc.publisher한국정보과학회-
dc.titleVLSI 설계에서 캐리-세이브 가산기를 이용한 설계 블록들 간의 최적화-
dc.title.alternativeOptimization between Design Blocks using Carry-Save-Adders in VLSI Design-
dc.typeArticle-
dc.type.rimsART-
dc.citation.volume26-
dc.citation.issue5-
dc.citation.beginningpage539-
dc.citation.endingpage626-
dc.citation.publicationname정보과학회논문지(A)-
dc.contributor.localauthor김태환-
dc.contributor.nonIdAuthor엄준형-
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