A scheduling policy for preserving cache locality in a multiprogrammed system

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dc.contributor.authorJung, Iko
dc.contributor.authorHyun, Jko
dc.contributor.authorLee, Joonwonko
dc.date.accessioned2013-02-27T09:26:08Z-
dc.date.available2013-02-27T09:26:08Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2000-11-
dc.identifier.citationJOURNAL OF SYSTEMS ARCHITECTURE, v.46, no.13, pp.1191 - 1204-
dc.identifier.issn1383-7621-
dc.identifier.urihttp://hdl.handle.net/10203/67742-
dc.description.abstractIn a multiprogrammed system, when the operating system switches contexts, in addition to the cost for handling the processes being swapped out and in, the cache performance of processors also can be affected. If frequent context switching replaces the data loaded into cache memory before they are completely reused, the programs suffer from cache misses due to the damage in cache locality. In particular, for the programs with good cache locality, such as blocked programs, a scheduling mechanism of keeping cache locality against context switching is essential to achieve good processor utilization. To solve this requirement, we propose a preemption-safe policy to exploit the cache locality of blocked programs in a multiprogrammed system. The proposed policy delays context switching until a block is fully reused, but also compensates for the monopolized processor time on processor scheduling mechanisms. Our simulation results show that in a situation, where blocked programs are run on multiprogrammed shared-memory multiprocessors, the proposed policy improves the performance of these programs due to a decrease in cache misses. In such situations, it also has a beneficial impact on the overall system performance due to the enhanced processor utilization. (C) 2000 Published by Elsevier Science B.V. All rights reserved.-
dc.languageEnglish-
dc.publisherELSEVIER SCIENCE BV-
dc.subjectPERFORMANCE-
dc.titleA scheduling policy for preserving cache locality in a multiprogrammed system-
dc.typeArticle-
dc.identifier.wosid000165169100004-
dc.type.rimsART-
dc.citation.volume46-
dc.citation.issue13-
dc.citation.beginningpage1191-
dc.citation.endingpage1204-
dc.citation.publicationnameJOURNAL OF SYSTEMS ARCHITECTURE-
dc.identifier.doi10.1016/S1383-7621(00)00020-5-
dc.contributor.nonIdAuthorJung, I-
dc.contributor.nonIdAuthorHyun, J-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorblocked algorithm-
dc.subject.keywordAuthormultiprogrammed system-
dc.subject.keywordAuthorcache locality-
dc.subject.keywordAuthorcontext switching-
dc.subject.keywordPlusPERFORMANCE-
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