MICROSTRUCTURE OF THE EMITTER POLYCRYSTALLINE SILICON SILICON INTERFACE IN BIPOLAR-TRANSISTORS AFTER RAPID THERMAL ANNEALING

Abstract

We use high-resolution transmission electron microscopy to determine the microstructure of the emitter polycrystalline (poly) Si/Si interface of real bipolar transistor devices after rapid thermal annealing. Our results quantity the size and density of interfacial oxide voids (pinholes), the areal fraction of the interface covered with voids, and the amount of epitaxial regrowth after annealing in the range 1000-1150-degrees-C. Correlation of these results with the characteristics of the devices shows that the most dramatic electrical changes occur before 2% of the poly-Si/Si interfacial area is covered with oxide voids.