Browse "BiS-Conference Papers(학술회의논문)" by Author Joshi, Siddharth
Showing results 1 to 9 of 9
| 2pJ/MAC 14b 8×8 linear transform mixed-signal spatial filter in 65nm CMOS with 84dB interference suppression Joshi, Siddharth; Kim, Chul; Ha, Sohmyung; Chi, Yu Mike; Cauwenberghs, Gert, 64th IEEE International Solid-State Circuits Conference, ISSCC 2017, pp.364 - 365, Institute of Electrical and Electronics Engineers Inc., 2017-02 |
| A 12.6 mW 8.3 Mevents/s contrast detection 128×128 imager with 75 dB intra-scene DR asynchronous random-access digital readout Park, Jongkil; Ha, Sohmyung; Kim, Chul; Joshi, Siddharth; Yu, Theodore; Ma, Wei; Cauwenberghs, Gert, 2014 IEEE Biomedical Circuits and Systems Conference (BioCAS), pp.564 - 567, IEEE, 2014-10 |
| A 4.2-pJ/Conv 10-b Asynchronous ADC with Hybrid Two-Tier Level-Crossing Event Coding Kubendran, Rajkumar; Park, Jongkil; Sharma, Ritvik; Kim, Chul; Joshi, Siddharth; Cauwenberghs, Gert; Ha, Sohmyung, 52nd IEEE International Symposium on Circuits and Systems, ISCAS 2020, Institute of Electrical and Electronics Engineers, 2020-10 |
| A 6μW/MHz charge buffer with 7fF input capacitance in 65nm CMOS for non-contact electropotential sensing Joshi, Siddharth; Kim, Chul; Cauwenberghs, Gert, 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, pp.2907, Institute of Electrical and Electronics Engineers Inc., 2016-05 |
| A 7.86 mW +12.5 dBm in-band IIP3 8-to-320 MHz capacitive harmonic rejection mixer in 65nm CMOS Kim, Chul; Ha, Sohmyung; Thomas, Chris; Joshi, Siddharth; Park, Jongkil; Larson, Lawrence; Cauwenberghs, Gert, 40th European Solid-State Circuit Conference, ESSCIRC 2014, pp.227 - 230, IEEE Computer Society, 2014-09 |
| A 92dB dynamic range sub-μVrms-noise 0.8μW/ch neural-recording ADC array with predictive digital autoranging Kim, Chul; Joshi, Siddharth; Courellis, Hristos; Wang, Jun; Miller, Cory; Cauwenberghs, Gert, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.470 - 472, Institute of Electrical and Electronics Engineers Inc., 2018-02 |
| A CMOS 4-channel MIMO baseband receiver with 65dB harmonic rejection over 48MHz and 50dB spatial signal separation over 3MHz at 1.3mW Kim, Chul; Joshi, Siddharth; Thomas, Chris; Ha, Sohmyung; Akinin, Abraham; Larson, Lawrence; Cauwenberghs, Gert, 29th Annual Symposium on VLSI Circuits, VLSI Circuits 2015, pp.C304 - C305, IEEE, 2015-06 |
| Energy-recycling integrated 6.78-Mbps data 6.3-mW power telemetry over a single 13.56-MHz inductive link Sohmyung Ha,; Kim, Chul; Park, Jongkil; Joshi, Siddharth; Cauwenberghs, Gert, 28th IEEE Symposium on VLSI Circuits, VLSIC 2014, IEEE, 2014-06 |
| From algorithms to devices: Enabling machine learning through ultra-low-power VLSI mixed-signal array processing Joshi, Siddharth; Kim, Chul; Ha, Sohmyung; Cauwenberghs, Gert, 38th Annual Custom Integrated Circuits Conference, CICC 2017, Institute of Electrical and Electronics Engineers Inc., 2017-05 |
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